Re: [PATCH v13 00/11] Parallel CPU bringup for x86_64

[Tom Lendacky]

On 3/7/23 16:27, David Woodhouse wrote:
> On Tue, 2023-03-07 at 16:22 -0600, Tom Lendacky wrote:
> > I did some Qemu/KVM testing. One thing I noticed is that on AMD, CPUID 0xB
> > EAX will be non-zero only if SMT is enabled. So just booting some guests
> > without CPU topology never did parallel booting ("smpboot: Disabling
> > parallel bringup because CPUID 0xb looks untrustworthy"). I would imagine
> > a bare-metal system that has diabled SMT will not do parallel booting, too
> > (but I haven't had time to test that).
>
> Interesting, thanks. Should I change to checking for *both* EAX and EBX
> being zero? That's what I did first, after reading only the Intel SDM.
> But I changed to only EAX because the AMD doc only says that EAX will
> be zero for unsupported leaves.

From a baremetal perspective, I think that works. Rome was the first 
generation to support x2apic, and the PPR for Rome states that 0's are 
returned in all 4 registers for undefined function numbers.

For virtualization, at least Qemu/KVM, that also looks to be a safe test.

Thanks,
Tom

> > I did have to change "vmgexit" to a "rep; vmmcall" based on my binutils
> > and the IS_ENABLED(CONFIG_AMD_MEM_ENCRYPT) change I mentioned before. But
> > with that, I was able to successfully boot 64 vCPU SEV-ES and SEV-SNP
> > guests using parallel booting.
>
> Thanks. I'll look at retconning that rework of can_parallel_bringup()
> out into a separate function, into the earlier parts of the series.