Re: [net-next PATCH 01/11] net: dsa: qca8k: add LEDs basic support

From: Christian Marangi
Date: Tue Mar 07 2023 - 18:21:23 EST


On Wed, Mar 08, 2023 at 12:16:13AM +0100, Andrew Lunn wrote:
> > +qca8k_setup_led_ctrl(struct qca8k_priv *priv)
> > +{
> > + struct fwnode_handle *ports, *port;
> > + int port_num;
> > + int ret;
> > +
> > + ports = device_get_named_child_node(priv->dev, "ports");
> > + if (!ports) {
> > + dev_info(priv->dev, "No ports node specified in device tree!\n");
> > + return 0;
> > + }
> > +
> > + fwnode_for_each_child_node(ports, port) {
> > + struct fwnode_handle *phy_node, *reg_port_node = port;
> > +
> > + phy_node = fwnode_find_reference(port, "phy-handle", 0);
> > + if (!IS_ERR(phy_node))
> > + reg_port_node = phy_node;
>
> I don't understand this bit. Why are you looking at the phy-handle?
>
> > +
> > + if (fwnode_property_read_u32(reg_port_node, "reg", &port_num))
> > + continue;
>
> I would of expect port, not reg_port_node. I'm missing something
> here....
>

It's really not to implement ugly things like "reg - 1"

On qca8k the port index goes from 0 to 6.
0 is cpu port 1
1 is port0 at mdio reg 0
2 is port1 at mdio reg 1
...
6 is cpu port 2

Each port have a phy-handle that refer to a phy node with the correct
reg and that reflect the correct port index.

Tell me if this looks wrong, for qca8k we have qca8k_port_to_phy() and
at times we introduced the mdio thing to describe the port - 1 directly
in DT. If needed I can drop the additional fwnode and use this function
but I would love to use what is defined in DT thatn a simple - 1.

--
Ansuel