[PATCH v1 13/14] arm64: dts: imx8mq-librem5: Reduce I2C frequency to 384kHz

From: Martin Kepplinger
Date: Thu Mar 09 2023 - 15:49:32 EST


From: Sebastian Krzyszkowiak <sebastian.krzyszkowiak@xxxxxxx>

According to imx8mq errata (ERR007805):

> To meet the clock low period requirement in fast speed mode,
> SCL must be configured to 384KHz or less.

Note that the imx i2c driver already implements this erratum and works
around it. This is only for the description to reflect reality.

Signed-off-by: Sebastian Krzyszkowiak <sebastian.krzyszkowiak@xxxxxxx>
Signed-off-by: Martin Kepplinger <martin.kepplinger@xxxxxxx>
---
arch/arm64/boot/dts/freescale/imx8mq-librem5.dtsi | 8 ++++----
1 file changed, 4 insertions(+), 4 deletions(-)

diff --git a/arch/arm64/boot/dts/freescale/imx8mq-librem5.dtsi b/arch/arm64/boot/dts/freescale/imx8mq-librem5.dtsi
index 7e70663cffa30..35bde8d41e8e7 100644
--- a/arch/arm64/boot/dts/freescale/imx8mq-librem5.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8mq-librem5.dtsi
@@ -778,7 +778,7 @@ MX8MQ_IOMUXC_GPIO1_IO02_WDOG1_WDOG_B 0x1f
};

&i2c1 {
- clock-frequency = <387000>;
+ clock-frequency = <384000>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_i2c1>;
status = "okay";
@@ -976,7 +976,7 @@ rtc@68 {
};

&i2c2 {
- clock-frequency = <387000>;
+ clock-frequency = <384000>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_i2c2>;
status = "okay";
@@ -1025,7 +1025,7 @@ accel_gyro: accel-gyro@6a {
};

&i2c3 {
- clock-frequency = <387000>;
+ clock-frequency = <384000>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_i2c3>;
status = "okay";
@@ -1115,7 +1115,7 @@ touchscreen@38 {
};

&i2c4 {
- clock-frequency = <387000>;
+ clock-frequency = <384000>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_i2c4>;
status = "okay";
--
2.30.2