Re: [PATCH 1/7] irqchip/gic-v3: Add a DMA Non-Coherent flag

[Peter Geis]

On Fri, Mar 10, 2023 at 6:57 AM Marc Zyngier <maz@xxxxxxxxxx> wrote:
>
> On Fri, 10 Mar 2023 11:41:46 +0000,
> Peter Geis <pgwipeout@xxxxxxxxx> wrote:
> >
> > On Fri, Mar 10, 2023 at 3:05 AM Lucas Tanure <lucas.tanure@xxxxxxxxxxxxx> wrote:
> > >
> > > The GIC600 integration in RK356x, used in rk3588, doesn't support
> > > any of the shareability or cacheability attributes, and requires
> > > both values to be set to 0b00 for all the ITS and Redistributor
> > > tables.
> > >
> > > This is loosely based on prior work from XiaoDong Huang and
> > > Peter Geis fixing this issue specifically for Rockchip 356x.
> >
> > Good Morning,
> >
> > Since the gic is using dma, would it be reasonable to have all memory
> > allocations be requested with the GFP_DMA flag? Otherwise this doesn't
> > fully solve the problem for rk356x, where only the lower 4GB range is
> > DMA capable, but this tends to get allocated in the upper 4GB on 8GB
> > boards.
>
> That's an erratum. Please treat as such.

Good Morning,

Yes, believe me I'm fully aware of how broken rk356x is. I'm asking an
educational question from a kernel standards point of view, absent the
rk356x issues. Would it be reasonable that since the gic uses dma
memory, allocations for the gic should be made with the GFP_DMA flag?
Or is that a misuse of the flag?

Very Respectfully,
Peter Geis

>
>         M.
>
> --
> Without deviation from the norm, progress is not possible.