RE: [PATCH v2 1/1] EDAC/skx: Fix overflows on the DRAM row address mapping arrays

[Luck, Tony]

> For a 32G rank, the most significant DRAM row address bit (the
> bit17) is mapped from the bit34 of the rank address. Add this new
> mapping item to both arrays to fix the overflow issue.

Applied to edac-drivers branch of the RAS tree.

Thanks

-Tony