On 16:58-20230313, Bhavya Kapoor wrote:Sure , i will modify the commit message in next patch.
J721s2 has two instances of 8 channel ADCs in MCU domain. Add DT nodesDrop the second line..
for both instances of 8 channel ADCs for J721s2 SoC.
ADC work without pinmux. Will send test log in next patch.
Signed-off-by: Bhavya Kapoor <b-kapoor@xxxxxx>Please provide links to previous versions of the patches.
---
Changelog v3->v4:
- add leading zeroes to reg address to match existing convention
- change clock names for adc to 'fck'
- remove spaces from start of line
.../dts/ti/k3-j721s2-common-proc-board.dts | 14 +++++++Curious: ADCs work without pinmux? any test log?
.../boot/dts/ti/k3-j721s2-mcu-wakeup.dtsi | 40 +++++++++++++++++++
2 files changed, 54 insertions(+)
diff --git a/arch/arm64/boot/dts/ti/k3-j721s2-common-proc-board.dts b/arch/arm64/boot/dts/ti/k3-j721s2-common-proc-board.dts
index a7aa6cf08acd..3bc4f28c809f 100644
--- a/arch/arm64/boot/dts/ti/k3-j721s2-common-proc-board.dts
+++ b/arch/arm64/boot/dts/ti/k3-j721s2-common-proc-board.dts
@@ -309,3 +309,17 @@ &mcu_mcan1 {
pinctrl-0 = <&mcu_mcan1_pins_default>;
phys = <&transceiver2>;
};
+
+&tscadc0 {
+ status = "okay";
+ adc {
+ ti,adc-channels = <0 1 2 3 4 5 6 7>;
+ };
+};
+
+&tscadc1 {
+ status = "okay";
yea, We can keep it enabled as well
+ adc {If it works without pinmux, why disable by default?
+ ti,adc-channels = <0 1 2 3 4 5 6 7>;
+ };
+};
diff --git a/arch/arm64/boot/dts/ti/k3-j721s2-mcu-wakeup.dtsi b/arch/arm64/boot/dts/ti/k3-j721s2-mcu-wakeup.dtsi
index 0af242aa9816..5da5f0cf7009 100644
--- a/arch/arm64/boot/dts/ti/k3-j721s2-mcu-wakeup.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-j721s2-mcu-wakeup.dtsi
@@ -306,4 +306,44 @@ cpts@3d000 {
ti,cpts-periodic-outputs = <2>;
};
};
+
+ tscadc0: tscadc@40200000 {
+ compatible = "ti,am3359-tscadc";
+ reg = <0x00 0x40200000 0x00 0x1000>;
+ interrupts = <GIC_SPI 860 IRQ_TYPE_LEVEL_HIGH>;
+ power-domains = <&k3_pds 0 TI_SCI_PD_EXCLUSIVE>;
+ clocks = <&k3_clks 0 0>;
+ assigned-clocks = <&k3_clks 0 2>;
+ assigned-clock-rates = <60000000>;
+ clock-names = "fck";
+ dmas = <&main_udmap 0x7400>,
+ <&main_udmap 0x7401>;
+ dma-names = "fifo0", "fifo1";
+ status = "disabled";
+
+ adc {
+ #io-channel-cells = <1>;
+ compatible = "ti,am3359-adc";
+ };
+ };
+
+ tscadc1: tscadc@40210000 {
+ compatible = "ti,am3359-tscadc";
+ reg = <0x00 0x40210000 0x00 0x1000>;
+ interrupts = <GIC_SPI 861 IRQ_TYPE_LEVEL_HIGH>;
+ power-domains = <&k3_pds 1 TI_SCI_PD_EXCLUSIVE>;
+ clocks = <&k3_clks 1 0>;
+ assigned-clocks = <&k3_clks 1 2>;
+ assigned-clock-rates = <60000000>;
+ clock-names = "fck";
+ dmas = <&main_udmap 0x7402>,
+ <&main_udmap 0x7403>;
+ dma-names = "fifo0", "fifo1";
+ status = "disabled";
+
+ adc {
+ #io-channel-cells = <1>;
+ compatible = "ti,am3359-adc";
+ };
+ };
};
--
2.34.1