RE: [PATCH 3/4] crypto: xilinx: Add ZynqMP RSA driver

[Harsha, Harsha]

Hi,

> -----Original Message-----
> From: Herbert Xu <herbert@xxxxxxxxxxxxxxxxxxx>
> Sent: Friday, March 10, 2023 4:02 PM
> To: Harsha, Harsha <harsha.harsha@xxxxxxx>
> Cc: davem@xxxxxxxxxxxxx; linux-crypto@xxxxxxxxxxxxxxx; linux-
> kernel@xxxxxxxxxxxxxxx; linux-arm-kernel@xxxxxxxxxxxxxxxxxxx;
> michals@xxxxxxxxxx; saratcha@xxxxxxxxxx; git (AMD-Xilinx) <git@xxxxxxx>;
> Shah, Dhaval (CPG-PSAV) <dhaval.r.shah@xxxxxxx>
> Subject: Re: [PATCH 3/4] crypto: xilinx: Add ZynqMP RSA driver
> 
> On Sat, Feb 18, 2023 at 11:08:08AM +0530, Harsha Harsha wrote:
> >
> > +			.cra_flags = CRYPTO_ALG_TYPE_AKCIPHER |
> > +				     CRYPTO_ALG_KERN_DRIVER_ONLY |
> > +				     CRYPTO_ALG_ALLOCATES_MEMORY |
> > +				     CRYPTO_ALG_NEED_FALLBACK,
> 
> The driver appears to be async so you should set the flag
> CRYPTO_ALG_ASYNC.

Thanks for the review.
For the RSA driver, below is the flow of operation:
RSA linux driver -> ATF -> Firmware -> RSA hardware engine.

To perform the operation, the request goes to the RSA HW engine. Once the operation is done, the response is sent back
via firmware and ATF to the linux driver. Meanwhile the API in the linux driver waits until the operation is complete.
This is why the driver is synchronous and therefore the CRYPTO_ALG_ASYNC flag is not set.

Regards,
Harsha

> 
> Thanks,
> --
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