Re: [PATCH v3 0/4] Add DT support for J721E CPSW9G and J7200 CPSW5G

[Andrew Davis]

On 3/15/23 1:23 AM, Siddharth Vadapalli wrote:
> Hello,
>
> This series adds the device-tree nodes for the CPSW9G instance of CPSW
> Ethernet Switch on TI's J721E SoC and the CPSW5G instance of CPSW
> Ethernet Switch on TI's J7200 SoC. Additionally, overlays are also added
> to individually enable CPSW9G on J721E SoC and CPSW5G on J7200 SoC in
> QSGMII mode with the Add-On J7 QUAD Port Ethernet expansion QSGMII
> daughtercard.
>
> This series combines the v2 series for J721E CPSW9G at:
> https://lore.kernel.org/r/20230310103504.731845-1-s-vadapalli@xxxxxx/
> and the v1 series for J7200 CPSW5G at:
> https://lore.kernel.org/r/20230310101407.722334-1-s-vadapalli@xxxxxx/
>
> The suggestions for the v2 series for J721E are implemented for the J7200
> series as well in this patch series.

Looks much better, thanks for the changes,

Reviewed-by: Andrew Davis <afd@xxxxxx>

> ---
> Changes from v2 for J721E CPSW9G series:
> 1. Rename the overlay k3-j721e-quad-port-eth-exp.dtso as
>     k3-j721e-evm-quad-port-eth-exp.dtso.
> 2. Update arch/arm64/boot/dts/ti/Makefile to build k3-j721e-evm.dtb as the
>     result of applying k3-j721e-evm-quad-port-eth-exp.dtbo to
>     k3-j721e-common-proc-board.dtb.
> 3. Use the newer "&{/} {" style instead of the "fragments" style in
>     k3-j721e-evm-quad-port-eth-exp.dtso.
> 4. Move the "mdio0_pins_default" pinctrl from cpsw0 node into the
>     "cpsw9g_mdio" node.
> 5. Disable individual "cpsw0_port" nodes in the main.dtsi file, enabling
>     only the required nodes in the overlay.
> 6. Disable the "cpsw9g_mdio" node in the main.dtsi file.
>
> Changes from v1 for J721E CPSW9G series:
> 1. Rename node name "mdio_pins_default" to "mdio0-pins-default", since
>     node names shouldn't contain underscores.
> 2. Change node label "mdio_pins_default" to "mdio0_pins_default".
>
> Changes from v1 for J7200 CPSW5G series:
> 1. Rename the overlay k3-j7200-quad-port-eth-exp.dtso as
>     k3-j7200-evm-quad-port-eth-exp.dtso.
> 2. Update arch/arm64/boot/dts/ti/Makefile to build k3-j7200-evm.dtb as the
>     result of applying k3-j7200-evm-quad-port-eth-exp.dtbo to
>     k3-j7200-common-proc-board.dtb.
> 3. Use the newer "&{/} {" style instead of the "fragments" style in
>     k3-j7200-evm-quad-port-eth-exp.dtso.
> 4. Move the "mdio0_pins_default" pinctrl from cpsw0 node into the
>     "cpsw5g_mdio" node.
> 5. Disable individual "cpsw0_port" nodes in the main.dtsi file, enabling
>     only the required nodes in the overlay.
> 6. Disable the "cpsw5g_mdio" node in the main.dtsi file.
>
> J721E CPSW9G v2 series:
> https://lore.kernel.org/r/20230310103504.731845-1-s-vadapalli@xxxxxx/
> J721E CPSW9G v1 series:
> https://lore.kernel.org/r/20230310092804.692303-1-s-vadapalli@xxxxxx/
> J7200 CPSW5G v1 series:
> https://lore.kernel.org/r/20230310101407.722334-1-s-vadapalli@xxxxxx/
>
> Siddharth Vadapalli (4):
>    arm64: dts: ti: k3-j721e: Add CPSW9G nodes
>    arm64: dts: ti: k3-j721e: Add overlay to enable CPSW9G ports in QSGMII
>      mode
>    arm64: dts: ti: j7200-main: Add CPSW5G nodes
>    arm64: dts: ti: k3-j7200: Add overlay to enable CPSW5G ports in QSGMII
>      mode
>
>   arch/arm64/boot/dts/ti/Makefile               |   6 +-
>   .../ti/k3-j7200-evm-quad-port-eth-exp.dtso    | 100 +++++++++++++
>   arch/arm64/boot/dts/ti/k3-j7200-main.dtsi     |  88 ++++++++++++
>   .../ti/k3-j721e-evm-quad-port-eth-exp.dtso    | 132 ++++++++++++++++++
>   arch/arm64/boot/dts/ti/k3-j721e-main.dtsi     | 116 +++++++++++++++
>   arch/arm64/boot/dts/ti/k3-j721e.dtsi          |   1 +
>   6 files changed, 441 insertions(+), 2 deletions(-)
>   create mode 100644 arch/arm64/boot/dts/ti/k3-j7200-evm-quad-port-eth-exp.dtso
>   create mode 100644 arch/arm64/boot/dts/ti/k3-j721e-evm-quad-port-eth-exp.dtso