Re: (subset) [PATCH 00/16] Qcom: Fix PCI I/O range defined in devicetree

[Bjorn Andersson]

On Tue, 28 Feb 2023 22:17:36 +0530, Manivannan Sadhasivam wrote:
> This series fixes the issue with PCI I/O ranges defined in devicetree of
> Qualcomm SoCs as reported by Arnd [1]. Most of the Qualcomm SoCs define
> identical mapping for the PCI I/O range. But the PCI device I/O ports
> are usually located between 0x0 to 64KiB/1MiB. So the defined PCI addresses are
> mostly bogus. The lack of bug report on this issue indicates that no one really
> tested legacy PCI devices with these SoCs.
> 
> [...]

Applied, thanks!

[14/16] ARM: dts: qcom: apq8064: Use 0x prefix for the PCI I/O and MEM ranges
        commit: 84160da56dd0ce48dd8eed56237cc8be45bd55dc
[15/16] ARM: dts: qcom: ipq4019: Fix the PCI I/O port range
        commit: 2540279e9a9e74fc880d1e4c83754ecfcbe290a0
[16/16] ARM: dts: qcom: ipq8064: Fix the PCI I/O port range
        commit: 0b16b34e491629016109e56747ad64588074194b

Best regards,
-- 
Bjorn Andersson <andersson@xxxxxxxxxx>