Re: [PATCH 08/15] dt-bindings: clock: Document ma35d1 clock controller bindings

[Jacky Huang]

Dear Stephen,


Thanks for your review.


On 2023/3/16 上午 05:59, Stephen Boyd wrote:
> Quoting Jacky Huang (2023-03-15 00:28:55)
> > diff --git a/Documentation/devicetree/bindings/clock/nuvoton,ma35d1-clk.yaml b/Documentation/devicetree/bindings/clock/nuvoton,ma35d1-clk.yaml
> > new file mode 100644
> > index 000000000000..5c2dea071b38
> > --- /dev/null
> > +++ b/Documentation/devicetree/bindings/clock/nuvoton,ma35d1-clk.yaml
> > @@ -0,0 +1,83 @@
> > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> > +%YAML 1.2
> > +---
> > +$id: http://devicetree.org/schemas/clock/nuvoton,ma35d1-clk.yaml#
> > +$schema: http://devicetree.org/meta-schemas/core.yaml#
> > +
> > +title: Nuvoton MA35D1 Clock Controller Module Binding
> Binding is redundant.

I will remove this word.

> > +
> > +maintainers:
> > +  - Chi-Fang Li <cfli0@xxxxxxxxxxx>
> > +  - Jacky Huang <ychuang3@xxxxxxxxxxx>
> > +
> > +description: |
> > +  The MA35D1 clock controller generates clocks for the whole chip,
> > +  including system clocks and all peripheral clocks.
> > +
> > +  See also:
> > +    include/dt-bindings/clock/ma35d1-clk.h
> > +
> > +properties:
> > +  compatible:
> > +    items:
> > +      - const: nuvoton,ma35d1-clk
> > +      - const: syscon
> Does it really need to be a syscon?

Some registers of the clock controller are locked against writing.
Before writing, the lock must be unlocked through the system controller.
So syscon is needed.

> > +
> > +  reg:
> > +    maxItems: 1
> > +
> > +  "#clock-cells":
> > +    const: 1
> > +
> > +  clocks:
> > +    maxItems: 1
> > +
> > +  clock-names:
> > +    const: clk_hxt
> > +
> > +  assigned-clocks:
> > +    maxItems: 5
> > +
> > +  assigned-clock-rates:
> > +    maxItems: 5
> I hope the assigned clocks properties can be left out of this doc.

Sure, we will remove it.

> > +
> > +  nuvoton,pll-mode:
> > +    description:
> > +      A list of PLL operation mode corresponding to CAPLL, DDRPLL, APLL,
> > +      EPLL, and VPLL in sequential. The operation mode value 0 is for
> > +      integer mode, 1 is for fractional mode, and 2 is for spread
> > +      spectrum mode.
> > +    $ref: /schemas/types.yaml#/definitions/uint32-array
> > +    maxItems: 5
> > +    items:
> > +      minimum: 0
> > +      maximum: 2
> Why not use a string?

OK, we'll use strings instead.

> > +
> > +  nuvoton,sys:
> > +    description:
> > +      Phandle to the system management controller.
> > +    $ref: "/schemas/types.yaml#/definitions/phandle-array"
> > +
> > +required:
> > +  - compatible
> > +  - reg
> > +  - "#clock-cells"
> > +  - clocks
> > +  - clock-names
> > +  - nuvoton,sys
> > +
> > +additionalProperties: false
> > +
> > +examples:
> > +  - |
> > +    #include <dt-bindings/clock/nuvoton,ma35d1-clk.h>
> No need to include this header right?

Yes, I will remove this header in the next version.

> > +
> > +    clk: clock-controller@40460200 {
> Drop the label?

OK, I will drop this label in the next version.

> > +        compatible = "nuvoton,ma35d1-clk", "syscon";
> > +        reg = <0x40460200 0x100>;
> > +        #clock-cells = <1>;
> > +        clocks = <&clk_hxt>;
> > +        clock-names = "clk_hxt";
> > +        nuvoton,sys = <&sys>;
> > +    };


Best Regards,

Jacky Huang