Re: [PATCH 2/2] perf/x86/intel/ds: Use the size from each PEBS record

From: kernel test robot
Date: Tue Mar 28 2023 - 20:35:37 EST


Hi,

Thank you for the patch! Perhaps something to improve:

[auto build test WARNING on tip/perf/core]
[also build test WARNING on acme/perf/core linus/master v6.3-rc4 next-20230328]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And when submitting patch, we suggest to use '--base' as documented in
https://git-scm.com/docs/git-format-patch#_base_tree_information]

url: https://github.com/intel-lab-lkp/linux/commits/kan-liang-linux-intel-com/perf-x86-intel-ds-Use-the-size-from-each-PEBS-record/20230329-064258
patch link: https://lore.kernel.org/r/20230328222735.1367829-2-kan.liang%40linux.intel.com
patch subject: [PATCH 2/2] perf/x86/intel/ds: Use the size from each PEBS record
config: x86_64-allyesconfig (https://download.01.org/0day-ci/archive/20230329/202303290854.CQhdHZDG-lkp@xxxxxxxxx/config)
compiler: gcc-11 (Debian 11.3.0-8) 11.3.0
reproduce (this is a W=1 build):
# https://github.com/intel-lab-lkp/linux/commit/a5988003cfa30fb0c88507d2d124eb551d42e1a6
git remote add linux-review https://github.com/intel-lab-lkp/linux
git fetch --no-tags linux-review kan-liang-linux-intel-com/perf-x86-intel-ds-Use-the-size-from-each-PEBS-record/20230329-064258
git checkout a5988003cfa30fb0c88507d2d124eb551d42e1a6
# save the config file
mkdir build_dir && cp config build_dir/.config
make W=1 O=build_dir ARCH=x86_64 olddefconfig
make W=1 O=build_dir ARCH=x86_64 SHELL=/bin/bash arch/x86/

If you fix the issue, kindly add following tag where applicable
| Reported-by: kernel test robot <lkp@xxxxxxxxx>
| Link: https://lore.kernel.org/oe-kbuild-all/202303290854.CQhdHZDG-lkp@xxxxxxxxx/

All warnings (new ones prefixed by >>):

arch/x86/events/intel/ds.c: In function '__intel_pmu_pebs_event':
>> arch/x86/events/intel/ds.c:2042:31: warning: unused variable 'cpuc' [-Wunused-variable]
2042 | struct cpu_hw_events *cpuc = this_cpu_ptr(&cpu_hw_events);
| ^~~~


vim +/cpuc +2042 arch/x86/events/intel/ds.c

d31fc13fdcb20e arch/x86/events/intel/ds.c Kan Liang 2018-02-12 2029
9dfa9a5c9bae34 arch/x86/events/intel/ds.c Peter Zijlstra 2020-10-30 2030 static __always_inline void
9dfa9a5c9bae34 arch/x86/events/intel/ds.c Peter Zijlstra 2020-10-30 2031 __intel_pmu_pebs_event(struct perf_event *event,
21509084f999d7 arch/x86/kernel/cpu/perf_event_intel_ds.c Yan, Zheng 2015-05-06 2032 struct pt_regs *iregs,
9dfa9a5c9bae34 arch/x86/events/intel/ds.c Peter Zijlstra 2020-10-30 2033 struct perf_sample_data *data,
21509084f999d7 arch/x86/kernel/cpu/perf_event_intel_ds.c Yan, Zheng 2015-05-06 2034 void *base, void *top,
c22497f5838c23 arch/x86/events/intel/ds.c Kan Liang 2019-04-02 2035 int bit, int count,
c22497f5838c23 arch/x86/events/intel/ds.c Kan Liang 2019-04-02 2036 void (*setup_sample)(struct perf_event *,
c22497f5838c23 arch/x86/events/intel/ds.c Kan Liang 2019-04-02 2037 struct pt_regs *,
c22497f5838c23 arch/x86/events/intel/ds.c Kan Liang 2019-04-02 2038 void *,
c22497f5838c23 arch/x86/events/intel/ds.c Kan Liang 2019-04-02 2039 struct perf_sample_data *,
c22497f5838c23 arch/x86/events/intel/ds.c Kan Liang 2019-04-02 2040 struct pt_regs *))
43cf76312faefe arch/x86/kernel/cpu/perf_event_intel_ds.c Yan, Zheng 2015-05-06 2041 {
c22497f5838c23 arch/x86/events/intel/ds.c Kan Liang 2019-04-02 @2042 struct cpu_hw_events *cpuc = this_cpu_ptr(&cpu_hw_events);
d31fc13fdcb20e arch/x86/events/intel/ds.c Kan Liang 2018-02-12 2043 struct hw_perf_event *hwc = &event->hw;
c22497f5838c23 arch/x86/events/intel/ds.c Kan Liang 2019-04-02 2044 struct x86_perf_regs perf_regs;
c22497f5838c23 arch/x86/events/intel/ds.c Kan Liang 2019-04-02 2045 struct pt_regs *regs = &perf_regs.regs;
21509084f999d7 arch/x86/kernel/cpu/perf_event_intel_ds.c Yan, Zheng 2015-05-06 2046 void *at = get_next_pebs_record_by_bit(base, top, bit);
e506d1dac0edb2 arch/x86/events/intel/ds.c Peter Zijlstra 2020-10-30 2047 static struct pt_regs dummy_iregs;
43cf76312faefe arch/x86/kernel/cpu/perf_event_intel_ds.c Yan, Zheng 2015-05-06 2048
d31fc13fdcb20e arch/x86/events/intel/ds.c Kan Liang 2018-02-12 2049 if (hwc->flags & PERF_X86_EVENT_AUTO_RELOAD) {
d31fc13fdcb20e arch/x86/events/intel/ds.c Kan Liang 2018-02-12 2050 /*
d31fc13fdcb20e arch/x86/events/intel/ds.c Kan Liang 2018-02-12 2051 * Now, auto-reload is only enabled in fixed period mode.
d31fc13fdcb20e arch/x86/events/intel/ds.c Kan Liang 2018-02-12 2052 * The reload value is always hwc->sample_period.
d31fc13fdcb20e arch/x86/events/intel/ds.c Kan Liang 2018-02-12 2053 * May need to change it, if auto-reload is enabled in
d31fc13fdcb20e arch/x86/events/intel/ds.c Kan Liang 2018-02-12 2054 * freq mode later.
d31fc13fdcb20e arch/x86/events/intel/ds.c Kan Liang 2018-02-12 2055 */
d31fc13fdcb20e arch/x86/events/intel/ds.c Kan Liang 2018-02-12 2056 intel_pmu_save_and_restart_reload(event, count);
d31fc13fdcb20e arch/x86/events/intel/ds.c Kan Liang 2018-02-12 2057 } else if (!intel_pmu_save_and_restart(event))
43cf76312faefe arch/x86/kernel/cpu/perf_event_intel_ds.c Yan, Zheng 2015-05-06 2058 return;
43cf76312faefe arch/x86/kernel/cpu/perf_event_intel_ds.c Yan, Zheng 2015-05-06 2059
35d1ce6bec1336 arch/x86/events/intel/ds.c Kan Liang 2020-09-02 2060 if (!iregs)
35d1ce6bec1336 arch/x86/events/intel/ds.c Kan Liang 2020-09-02 2061 iregs = &dummy_iregs;
35d1ce6bec1336 arch/x86/events/intel/ds.c Kan Liang 2020-09-02 2062
a3d86542de8850 arch/x86/kernel/cpu/perf_event_intel_ds.c Peter Zijlstra 2015-05-12 2063 while (count > 1) {
9dfa9a5c9bae34 arch/x86/events/intel/ds.c Peter Zijlstra 2020-10-30 2064 setup_sample(event, iregs, at, data, regs);
9dfa9a5c9bae34 arch/x86/events/intel/ds.c Peter Zijlstra 2020-10-30 2065 perf_event_output(event, data, regs);
a5988003cfa30f arch/x86/events/intel/ds.c Kan Liang 2023-03-28 2066 at += get_pebs_size(at);
21509084f999d7 arch/x86/kernel/cpu/perf_event_intel_ds.c Yan, Zheng 2015-05-06 2067 at = get_next_pebs_record_by_bit(at, top, bit);
a3d86542de8850 arch/x86/kernel/cpu/perf_event_intel_ds.c Peter Zijlstra 2015-05-12 2068 count--;
21509084f999d7 arch/x86/kernel/cpu/perf_event_intel_ds.c Yan, Zheng 2015-05-06 2069 }
21509084f999d7 arch/x86/kernel/cpu/perf_event_intel_ds.c Yan, Zheng 2015-05-06 2070
9dfa9a5c9bae34 arch/x86/events/intel/ds.c Peter Zijlstra 2020-10-30 2071 setup_sample(event, iregs, at, data, regs);
35d1ce6bec1336 arch/x86/events/intel/ds.c Kan Liang 2020-09-02 2072 if (iregs == &dummy_iregs) {
35d1ce6bec1336 arch/x86/events/intel/ds.c Kan Liang 2020-09-02 2073 /*
35d1ce6bec1336 arch/x86/events/intel/ds.c Kan Liang 2020-09-02 2074 * The PEBS records may be drained in the non-overflow context,
35d1ce6bec1336 arch/x86/events/intel/ds.c Kan Liang 2020-09-02 2075 * e.g., large PEBS + context switch. Perf should treat the
35d1ce6bec1336 arch/x86/events/intel/ds.c Kan Liang 2020-09-02 2076 * last record the same as other PEBS records, and doesn't
35d1ce6bec1336 arch/x86/events/intel/ds.c Kan Liang 2020-09-02 2077 * invoke the generic overflow handler.
35d1ce6bec1336 arch/x86/events/intel/ds.c Kan Liang 2020-09-02 2078 */
9dfa9a5c9bae34 arch/x86/events/intel/ds.c Peter Zijlstra 2020-10-30 2079 perf_event_output(event, data, regs);
35d1ce6bec1336 arch/x86/events/intel/ds.c Kan Liang 2020-09-02 2080 } else {
21509084f999d7 arch/x86/kernel/cpu/perf_event_intel_ds.c Yan, Zheng 2015-05-06 2081 /*
21509084f999d7 arch/x86/kernel/cpu/perf_event_intel_ds.c Yan, Zheng 2015-05-06 2082 * All but the last records are processed.
21509084f999d7 arch/x86/kernel/cpu/perf_event_intel_ds.c Yan, Zheng 2015-05-06 2083 * The last one is left to be able to call the overflow handler.
21509084f999d7 arch/x86/kernel/cpu/perf_event_intel_ds.c Yan, Zheng 2015-05-06 2084 */
9dfa9a5c9bae34 arch/x86/events/intel/ds.c Peter Zijlstra 2020-10-30 2085 if (perf_event_overflow(event, data, regs))
a4eaf7f14675cb arch/x86/kernel/cpu/perf_event_intel_ds.c Peter Zijlstra 2010-06-16 2086 x86_pmu_stop(event, 0);
21509084f999d7 arch/x86/kernel/cpu/perf_event_intel_ds.c Yan, Zheng 2015-05-06 2087 }
2b0b5c6fe9b383 arch/x86/kernel/cpu/perf_event_intel_ds.c Peter Zijlstra 2010-04-08 2088 }
2b0b5c6fe9b383 arch/x86/kernel/cpu/perf_event_intel_ds.c Peter Zijlstra 2010-04-08 2089

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