Re: [Patch V9 1/3] spi: Add TPM HW flow flag

From: Jarkko Sakkinen
Date: Wed Mar 29 2023 - 18:40:49 EST


On Sun, Mar 26, 2023 at 12:04:07AM +0530, Krishna Yarlagadda wrote:
> TPM specification [1] defines flow control over SPI. Client device can
> insert a wait state on MISO when address is transmitted by controller
> on MOSI. Detecting the wait state in software is only possible for
> full duplex controllers. For controllers that support only half-
> duplex, the wait state detection needs to be implemented in hardware.
>
> Add a flag SPI_TPM_HW_FLOW for TPM device to set when software flow
> control is not possible and hardware flow control is expected from
> SPI controller.
>
> Reference:
> [1] https://trustedcomputinggroup.org/resource/pc-client-work-group-
> pc-client-specific-tpm-interface-specification-tis/
>
> Signed-off-by: Krishna Yarlagadda <kyarlagadda@xxxxxxxxxx>
> ---
> include/linux/spi/spi.h | 16 +++++++++++++---
> 1 file changed, 13 insertions(+), 3 deletions(-)
>
> diff --git a/include/linux/spi/spi.h b/include/linux/spi/spi.h
> index 873ced6ae4ca..cfe42f8cd7a4 100644
> --- a/include/linux/spi/spi.h
> +++ b/include/linux/spi/spi.h
> @@ -184,8 +184,18 @@ struct spi_device {
> u8 chip_select;
> u8 bits_per_word;
> bool rt;
> -#define SPI_NO_TX BIT(31) /* No transmit wire */
> -#define SPI_NO_RX BIT(30) /* No receive wire */
> +#define SPI_NO_TX BIT(31) /* No transmit wire */
> +#define SPI_NO_RX BIT(30) /* No receive wire */
> + /*
> + * TPM specification defines flow control over SPI. Client device
> + * can insert a wait state on MISO when address is transmitted by
> + * controller on MOSI. Detecting the wait state in software is only
> + * possible for full duplex controllers. For controllers that support
> + * only half-duplex, the wait state detection needs to be implemented
> + * in hardware. TPM devices would set this flag when hardware flow
> + * control is expected from SPI controller.
> + */
> +#define SPI_TPM_HW_FLOW BIT(29) /* TPM HW flow control */
> /*
> * All bits defined above should be covered by SPI_MODE_KERNEL_MASK.
> * The SPI_MODE_KERNEL_MASK has the SPI_MODE_USER_MASK counterpart,
> @@ -195,7 +205,7 @@ struct spi_device {
> * These bits must not overlap. A static assert check should make sure of that.
> * If adding extra bits, make sure to decrease the bit index below as well.
> */
> -#define SPI_MODE_KERNEL_MASK (~(BIT(30) - 1))
> +#define SPI_MODE_KERNEL_MASK (~(BIT(29) - 1))
> u32 mode;
> int irq;
> void *controller_state;
> --
> 2.17.1
>


Acked-by: Jarkko Sakkinen <jarkko@xxxxxxxxxx>

BR, Jarkko