Re: [PATCH v8 char-misc-next 3/5] misc: microchip: pci1xxxx: Add EEPROM Functionality to read and write into EEPROM bin sysfs
From: VaibhaavRam.TL
Date: Thu Mar 30 2023 - 01:28:51 EST
On Wed, 2023-03-29 at 12:01 +0200, Greg KH wrote:
> EXTERNAL EMAIL: Do not click links or open attachments unless you
> know the content is safe
>
> On Tue, Mar 28, 2023 at 08:10:06PM +0530, Vaibhaav Ram T.L wrote:
> > From: Kumaravel Thiagarajan <kumaravel.thiagarajan@xxxxxxxxxxxxx>
> >
> > Microchip's pci1xxxx is an unmanaged PCIe3.1a switch for consumer,
> > industrial, and automotive applications. This switch integrates OTP
> > and EEPROM to enable customization of the part in the field.
> > This patch adds EEPROM functionality to support the same.
>
> Again, why not use the in-kernel eeprom api instead?
Unlike other in-Kernel EEPROM APIs, this EEPROM is not accessible
through any of the i2c/spi buses available to the kernel.
It is only accessible through the register interface available in the
EEPROM controller of the PCI1XXXX device.
The architecture of the device was explained @
https://lore.kernel.org/all/Y+9HOdHGqmPP%2FUde@xxxxxxxxx/
>
> thanks,
>
> greg k-h