[PATCH v1 5/6] drm/bridge: tc358768: Add parallel data format cfg

From: Francesco Dolcini
Date: Thu Mar 30 2023 - 06:00:11 EST


From: Francesco Dolcini <francesco.dolcini@xxxxxxxxxxx>

Add configuration for parallel data format register, tc358768 supports
different mapping on the parallel input RGB interface, enable the
configuration for it.

Valid values, and the related meaning, are:
0 = R[7:0], G[7:0], B[7:0]
1 = R[1:0], G[1:0], B[1:0], R[7:2], G[7:2], B[7:2]
2 = 8’b0, R[4:0], G[5:0], B[4:0]

Use 0 by default, consistently with the HW default.

Signed-off-by: Francesco Dolcini <francesco.dolcini@xxxxxxxxxxx>
---
drivers/gpu/drm/bridge/tc358768.c | 5 +++++
1 file changed, 5 insertions(+)

diff --git a/drivers/gpu/drm/bridge/tc358768.c b/drivers/gpu/drm/bridge/tc358768.c
index f4499ae7bee6..4462264274af 100644
--- a/drivers/gpu/drm/bridge/tc358768.c
+++ b/drivers/gpu/drm/bridge/tc358768.c
@@ -854,6 +854,11 @@ static void tc358768_bridge_pre_enable(struct drm_bridge *bridge)
if (mode->flags & DRM_MODE_FLAG_PHSYNC)
tc358768_update_bits(priv, TC358768_PP_MISC, BIT(0), BIT(0));

+ /* PDataF: Parallel Data Format */
+ val = 0;
+ of_property_read_u32(bridge->of_node, "toshiba,input-rgb-mode", &val);
+ tc358768_update_bits(priv, TC358768_CONFCTL, BIT(8) | BIT(9), val << 8);
+
/* Start DSI Tx */
tc358768_write(priv, TC358768_DSI_START, 0x1);

--
2.25.1