Re: [PATCH v1 3/6] dt-bindings: display: bridge: toshiba,tc358768: add parallel input mode

[Francesco Dolcini]

On Fri, Mar 31, 2023 at 10:48:15AM +0200, Krzysztof Kozlowski wrote:
> On 30/03/2023 11:59, Francesco Dolcini wrote:
> > From: Francesco Dolcini <francesco.dolcini@xxxxxxxxxxx>
> > 
> > Add new toshiba,input-rgb-mode property to describe the actual signal
> > connection on the parallel RGB input interface.
> > 
> > Signed-off-by: Francesco Dolcini <francesco.dolcini@xxxxxxxxxxx>
> > ---
> >  .../bindings/display/bridge/toshiba,tc358768.yaml | 15 +++++++++++++++
> >  1 file changed, 15 insertions(+)
> > 
> > diff --git a/Documentation/devicetree/bindings/display/bridge/toshiba,tc358768.yaml b/Documentation/devicetree/bindings/display/bridge/toshiba,tc358768.yaml
> > index 8f22093b61ae..2638121a2223 100644
> > --- a/Documentation/devicetree/bindings/display/bridge/toshiba,tc358768.yaml
> > +++ b/Documentation/devicetree/bindings/display/bridge/toshiba,tc358768.yaml
> > @@ -42,6 +42,21 @@ properties:
> >    clock-names:
> >      const: refclk
> >  
> > +  toshiba,input-rgb-mode:
> > +    description: |
> > +      Parallel Input (RGB) Mode.
> > +
> > +      RGB inputs (PD[23:0]) color arrangement as documented in the datasheet
> > +      and in the table below.
> > +
> > +      0 = R[7:0], G[7:0], B[7:0]
> 
> RGB888?

Or anything else - like a RGB666 - just connecting to GND the unused
pins.

> > +      1 = R[1:0], G[1:0], B[1:0], R[7:2], G[7:2], B[7:2]
> > +      2 = 8’b0, R[4:0], G[5:0], B[4:0]
> 
> Isn't this RGB565?
> 
> Don't we have already properties like this? e.g. colorspace?

It's not really the colorspace this property.

tc358768 is a parallel RGB to DSI bridge, it has 24 bit parallel input
line.

The way this lines are connected is configurable with this parameter, if you
look at mode 0 and 1 they all allow to have a RGB888 or a RGB666 or a
RGB565 mapping. This just configure some internal mux, it's not strictly
about the RGB mode.

The description for mode 2 was copied from the datasheet, and I agree
this is really about having a RGB565 on the first 16 parallel input
pins.

Honestly I do not know what is going to happen with PD[23-16] if they
are not connected to GND, given that the component does not know the
parallel input bus width it might as well sample those pins in some
un-documented way.

Francesco