[PATCH net-next v3 0/3] Add support for J784S4 CPSW9G

[Siddharth Vadapalli]

Hello,

This series adds a new compatible to am65-cpsw driver for the CPSW9G
instance of the CPSW Ethernet Switch on TI's J784S4 SoC which has 8
external ports and 1 internal host port.

The CPSW9G instance supports QSGMII and USXGMII modes for which driver
support is added.

Additionally, the interface mode specific configurations are moved to the
am65_cpsw_nuss_mac_config() callback. Also, a TODO comment is added for
verifying whether in-band mode is necessary for 10 Mbps RGMII mode.

NOTE:
I have verified that the mac_config() operations are preserved across
link up and link down events for SGMII and USXGMII mode with the new
implementation in this series, as suggested by:
Russell King <linux@xxxxxxxxxxxxxxx>

For patches 1 and 3 of this series, I believe that the following tag:
Suggested-by: Russell King <linux@xxxxxxxxxxxxxxx>
should be added. However, I did not add it since I did not yet get
the permission to do so. I will be happy if the tags are added, since
the new implementation is almost entirely based on Russell's suggestion,
with minor changes made by me.

Changes from v2:
1. In am65_cpsw_nuss_mac_config(), set the CPSW_SL_CTL_EXT_EN bit in the
   MAC control register if the mode is SGMII. Else, clear that bit.
2. In am65_cpsw_nuss_mac_link_down(), instead of resetting the entire MAC
   control register, only clear those bits that can possibly be set in the
   am65_cpsw_nuss_mac_link_up() function. Resetting the entire MAC control
   register will result in loss of the configuration performed by the
   am65_cpsw_nuss_mac_config() function.
3. In am65_cpsw_nuss_mac_link_down(), since the MAC control register
   will not be reset, the CPSW_SL_CTL_CMD_IDLE bit which was previously
   cleared as a part of the reset, needs to be cleared in the
   am65_cpsw_nuss_mac_link_up() function. This is the correct approach,
   since the MAC should remain IDLE until the link is detected.
4. In am65_cpsw_nuss_mac_config(), set the CPSW_SL_CTL_XGIG and the
   CPSW_SL_CTL_XGMII_EN bits in the MAC control register if the mode is
   USXGMII. Else, clear those bits.

Changes from v1:
1. Add a patch to move interface mode specific configuration from the
   mac_link_up() callback to the mac_config() callback of the am65-cpsw
   driver. Also, add a TODO comment for 10 Mbps RGMII in-band mode.
2. Add MAC_5000FD to the list of mac_capabilities member unconditionally,
   since the CPSW MAC supports it.
3. Add USXGMII mode specific configuration in the mac_config() callback
   along with the SGMII mode specific configuration, instead of the
   mac_link_up() callback which was incorrectly done in the v1 series.

v2:
https://lore.kernel.org/r/20230403110106.983994-1-s-vadapalli@xxxxxx/
v1:
https://lore.kernel.org/r/20230331065110.604516-1-s-vadapalli@xxxxxx/

Regards,
Siddharth.

Siddharth Vadapalli (3):
  net: ethernet: ti: am65-cpsw: Move mode specific config to
    mac_config()
  net: ethernet: ti: am65-cpsw: Enable QSGMII for J784S4 CPSW9G
  net: ethernet: ti: am65-cpsw: Enable USXGMII mode for J784S4 CPSW9G

 drivers/net/ethernet/ti/am65-cpsw-nuss.c | 42 +++++++++++++++++++++---
 1 file changed, 37 insertions(+), 5 deletions(-)

-- 
2.25.1