Re: [PATCH v5 03/15] x86/mtrr: replace some constants with defines

From: Borislav Petkov
Date: Wed Apr 05 2023 - 16:26:46 EST


On Wed, Apr 05, 2023 at 09:55:59AM +0200, Juergen Gross wrote:
> On 03.04.23 18:03, Borislav Petkov wrote:
> > On Sat, Apr 01, 2023 at 08:36:40AM +0200, Juergen Gross wrote:
> > > @@ -643,10 +646,12 @@ static bool set_mtrr_var_ranges(unsigned int index, struct mtrr_var_range *vr)
> > > unsigned int lo, hi;
> > > bool changed = false;
> > > +#define BASE_MASK (MTRR_BASE_TYPE_MASK | (size_and_mask << PAGE_SHIFT))
> > > +#define MASK_MASK (MTRR_MASK_VALID | (size_and_mask << PAGE_SHIFT))
> >
> > No, "MASK_MASK" is too much. :-)
>
> Any better suggestion for the name? :-)

Looking at this again, what this is actually doing is masking out the
reserved bits. But in an unnecessarily complicated way.

What it should do, instead, is do that explicitly:

/* Zap the reserved bits and compare only the valid fields: */
if (((vr->base_lo & ~RESV_LOW) != (lo & ~RESV_LOW)) ||
((vr->base_hi & ~RESV_HI) != (hi & ~RESV_HI)))

where

#define RESV_LOW GENMASK_ULL(8, 11)
#define RESV_HI GENMASK(phys_addr - 1, 63)

and then we can get rid of that size_or_mask and size_and_mask
stupidity.

I think that would simplify this variable ranges handling code a lot
more and make it pretty straightforward...

> No. The "48" is the _number_ of physical address bits, so the 64 bit address
> mask will be 0000ffff.ffffffff (48 bits set).

Uff, sorry about that. I got confused by that SIZE_OR_MASK_BITS() where
phys_addr and not phys_addr - 1 works because it the arithmetic works
with starting bit 0.

--
Regards/Gruss,
Boris.

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