Re: [PATCH V3 00/20] Add basic ACPI support for RISC-V

From: Atish Kumar Patra
Date: Wed Apr 05 2023 - 22:47:56 EST


On Tue, Apr 4, 2023 at 12:24 PM Sunil V L <sunilvl@xxxxxxxxxxxxxxxx> wrote:
>
> On Tue, Apr 04, 2023 at 02:35:19PM +0800, Ley Foon Tan wrote:
> > On Wed, Mar 8, 2023 at 9:08 AM Sunil V L <sunilvl@xxxxxxxxxxxxxxxx> wrote:
> > >
> > > On Tue, Mar 07, 2023 at 06:44:35PM +0000, Conor Dooley wrote:
> > > > On Tue, Mar 07, 2023 at 06:13:22AM +0000, Conor Dooley wrote:
> > > > >
> > > > >
> > > > > On 7 March 2023 05:06:16 GMT, Sunil V L <sunilvl@xxxxxxxxxxxxxxxx> wrote:
> > > > > >On Mon, Mar 06, 2023 at 09:51:09PM +0000, Conor Dooley wrote:
> > > > > >> Hey Sunil,
> > > > > >>
> > > > > >> On Fri, Mar 03, 2023 at 07:06:27PM +0530, Sunil V L wrote:
> > > > > >> > This patch series enables the basic ACPI infrastructure for RISC-V.
> > > > > >> > Supporting external interrupt controllers is in progress and hence it is
> > > > > >> > tested using poll based HVC SBI console and RAM disk.
> > > > > >> >
> > > > > >> > The first patch in this series is one of the patch from Jisheng's
> > > > > >> > series [1] which is not merged yet. This patch is required to support
> > > > > >> > ACPI since efi_init() which gets called before sbi_init() can enable
> > > > > >> > static branches and hits a panic.
> > > > > >> >
> > > > > >> > Patch 2 and 3 are ACPICA patches which are not merged into acpica yet
> > > > > >> > but a PR is raised already.
> > > > > >> >
> > > > > >> > Below are two ECRs approved by ASWG.
> > > > > >> > RINTC - https://drive.google.com/file/d/1R6k4MshhN3WTT-hwqAquu5nX6xSEqK2l/view
> > > > > >> > RHCT - https://drive.google.com/file/d/1nP3nFiH4jkPMp6COOxP6123DCZKR-tia/view
> > > > > >> >
> > > > > >> > The series depends on Anup's IPI improvement series [2].
> > > > > >> >
> > > > > >> > [1] https://lore.kernel.org/all/20220821140918.3613-1-jszhang@xxxxxxxxxx/
> > > > > >> > [2] https://lore.kernel.org/lkml/20230103141221.772261-7-apatel@xxxxxxxxxxxxxxxx/T/
> > > > > >>
> > > > > >> Building a clang-15 allmodconfig (I didn't try gcc) with this series, and
> > > > > >> Anup's IPI bits, results in a broken build, due to failings in cmpxchg:
> > > > > >>
> > > > > >> /stuff/linux/drivers/platform/surface/aggregator/controller.c:61:25: error: call to __compiletime_assert_335 declared with 'error' attribute: BUILD_BUG failed
> > > > > >> while (unlikely((ret = cmpxchg(&c->value, old, new)) != old)) {
> > > > > >> ^
> > > >
> > > > > > I am able to build without any of these issues using clang-15. I am
> > > > > > wondering whether the base is proper. I had rebased on top of the master
> > > > > > and couple of patches from IPI series were already merged in the master.
> > > > > >
> > > > > > Do you mind verifying with my branch
> > > > > > https://github.com/vlsunil/linux/commits/acpi_b1_us_review_ipi17_V3?
> > > > >
> > > > > I can check that later I suppose.
> > > >
> > > > That's broken too.
> > > >
> > > > > > Or if you could provide me your branch details, I can look further.
> > > > >
> > > > > 6.3-rc1, with both series applied, sans Anups applied patches.
> > > >
> > > > I've pushed my stuff here, but unlikely that it makes any odds since
> > > > your branch experiences the same build issue.
> > > > https://git.kernel.org/pub/scm/linux/kernel/git/conor/linux.git/ borked-acpi-surface
> > > >
> > > > My build commands are wrapped in a script, but it's an LLVM=1
> > > > allmodconfig run w/ clang-15(.0.7) etc.
> > > >
> > > Ahh allmodconfig. Thank you very much!. I can reproduce the failure. Let
> > > me look further and fix in next revision.
> > >
> > > Thanks!
> > > Sunil
> >
> > Hi Sunil
> >
> > One question regarding PMU in ACPI flow.
> >
> > We use DT to decode the supported HPM counters/events for the
> > different platforms now.
> > How do we enable PMU (drivers/perf/riscv_pmu_sbi.c) when using ACPI method?
> > Note, this might be in separate patch series.
> >
> Hi Lay Foon,
>
> This driver uses SBI calls and hence should work in case of ACPI also.
>
> There is one minor change required in this driver for overflow
> interrupt. I have a patch for that in future series.

Just to add further clarification: OpenSBI will continue to use the
device tree so that
the firmware will have access to all the PMU details.

>
> Thanks,
> Sunil