On Tue, Apr 04, 2023 at 11:33:20PM +0530, Vijaya Krishna Nivarthi wrote:
A few quick review comments, mostly coding style though.
+struct qspi_cmd_desc {What does this mean?
+ uint32_t data_address;
+ uint32_t next_descriptor;
+ uint32_t direction:1;
+ uint32_t multi_io_mode:3;
+ uint32_t reserved1:4;
+ uint32_t fragment:1;
+ uint32_t reserved2:7;
+ uint32_t length:16;
+ //------------------------//
+ uint8_t *bounce_src;Missing blank line after the define...
+ uint8_t *bounce_dst;
+ uint32_t bounce_length;
+};
+
+#define QSPI_MAX_NUM_DESC 5
struct qspi_xfer {
+ for (ii = 0; ii < sgt->nents; ii++)Why are we calling the iterator ii here?
+ sg_total_len += sg_dma_len(sgt->sgl + ii);
+ if (ctrl->xfer.dir == QSPI_READ)If we need to cast to or from void * there's some sort of problem.
+ byte_ptr = (uint8_t *)xfer->rx_buf;
+ else
+ byte_ptr = (uint8_t *)xfer->tx_buf;
+/* Switch to DMA if transfer length exceeds this */DMA_CONDITIONAL absolutely should not be a define, this just makes
+#define QSPI_MAX_BYTES_FIFO 64
+#define NO_TX_DATA_DELAY_FOR_DMA 1
+#define DMA_CONDITIONAL (xfer->len > QSPI_MAX_BYTES_FIFO)
+
things harder to read. Just have everything call can_dma() when needed.
+#if NO_TX_DATA_DELAY_FOR_DMAWhy would we add extra delays if we don't need them, might someone set
+ mstr_cfg &= ~(TX_DATA_OE_DELAY_MSK | TX_DATA_DELAY_MSK);
+#endif
this and if so when?
+ if (ctrl->xfer_mode == QSPI_FIFO) {This should be a switch statement.
+ } else if (ctrl->xfer_mode == QSPI_DMA) {
}