RE: revert bab65e48cb064 PCI/MSI Sanitize MSI-X checks

[David Laight]

From: Linus Torvalds
> Sent: 06 April 2023 20:36
> 
> On Thu, Apr 6, 2023 at 4:05 AM David Laight <David.Laight@xxxxxxxxxx> wrote:
> >
> > So code like:
> >         for (i = 0; i < 16; i++)
> >                 msix_tbl[i].entry = i;
> >         nvec = pci_enable_msix_range(dev, msix_tbl, 1, 16);
> > Now returns -22 if the hardware only supports 8 interrupts.
> >
> > Previously it returned 8.
> 
> Does just moving the pci_msix_validate_entries() down to below the
> hwsize update code fix it?

I think it depends on why the driver is asking for more
interrupts than the hardware supports.
Potentially the driver could do:
	for (i = 0; i < 8; i++)
		msix_tbl[i].entry = 2 * i;
if the hardware supports 8 interrupts perhaps it
should return 4?

In my case both the MSI-X logic on the fpga and the driver
support 16 interrupts, but PCIe config space reports 8.
The high numbered interrupts aren't used very often and get
multiplexed onto the highest 'real' interrupt.
(The fpga build makes it pretty much impossible to tie
together the config space value and the size of the MSI-X
table.)

	David

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