[PATCH 3/3] arm64: dts: MSM8953: Add lpass nodes

From: Adam Skladowski
Date: Fri Apr 07 2023 - 12:54:45 EST


Add nodes for remoteproc, smp2p and smsm in preparation
for audio support on this platform.

Signed-off-by: Adam Skladowski <a39.skl@xxxxxxxxx>
---
arch/arm64/boot/dts/qcom/msm8953.dtsi | 141 ++++++++++++++++++++++++++
1 file changed, 141 insertions(+)

diff --git a/arch/arm64/boot/dts/qcom/msm8953.dtsi b/arch/arm64/boot/dts/qcom/msm8953.dtsi
index 257b1946372c..855595cbb09b 100644
--- a/arch/arm64/boot/dts/qcom/msm8953.dtsi
+++ b/arch/arm64/boot/dts/qcom/msm8953.dtsi
@@ -6,6 +6,9 @@
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/interrupt-controller/arm-gic.h>
#include <dt-bindings/power/qcom-rpmpd.h>
+#include <dt-bindings/soc/qcom,apr.h>
+#include <dt-bindings/sound/qcom,q6afe.h>
+#include <dt-bindings/sound/qcom,q6asm.h>
#include <dt-bindings/thermal/thermal.h>

/ {
@@ -326,6 +329,30 @@ rpmpd_opp_turbo: opp9 {
};
};

+ smp2p-adsp {
+ compatible = "qcom,smp2p";
+ qcom,smem = <443>, <429>;
+
+ interrupts = <GIC_SPI 291 IRQ_TYPE_EDGE_RISING>;
+
+ mboxes = <&apcs 10>;
+
+ qcom,local-pid = <0>;
+ qcom,remote-pid = <2>;
+
+ smp2p_adsp_out: master-kernel {
+ qcom,entry-name = "master-kernel";
+ #qcom,smem-state-cells = <1>;
+ };
+
+ smp2p_adsp_in: slave-kernel {
+ qcom,entry-name = "slave-kernel";
+
+ interrupt-controller;
+ #interrupt-cells = <2>;
+ };
+ };
+
smp2p-modem {
compatible = "qcom,smp2p";
qcom,smem = <435>, <428>;
@@ -1532,6 +1559,120 @@ frame@b128000 {
status = "disabled";
};
};
+
+ lpass: remoteproc@c200000 {
+ compatible = "qcom,msm8953-adsp-pil";
+ reg = <0x0c200000 0x100>;
+
+ interrupts-extended = <&intc 0 293 IRQ_TYPE_EDGE_RISING>,
+ <&smp2p_adsp_in 0 IRQ_TYPE_EDGE_RISING>,
+ <&smp2p_adsp_in 1 IRQ_TYPE_EDGE_RISING>,
+ <&smp2p_adsp_in 2 IRQ_TYPE_EDGE_RISING>,
+ <&smp2p_adsp_in 3 IRQ_TYPE_EDGE_RISING>;
+ interrupt-names = "wdog", "fatal", "ready",
+ "handover", "stop-ack";
+ clocks = <&rpmcc RPM_SMD_XO_CLK_SRC>;
+ clock-names = "xo";
+
+ power-domains = <&rpmpd MSM8953_VDDCX>;
+ power-domain-names = "cx";
+
+ memory-region = <&adsp_fw_mem>;
+
+ qcom,smem-states = <&smp2p_adsp_out 0>;
+ qcom,smem-state-names = "stop";
+
+ status = "disabled";
+
+ smd-edge {
+ interrupts = <GIC_SPI 289 IRQ_TYPE_EDGE_RISING>;
+
+ label = "lpass";
+ mboxes = <&apcs 8>;
+ qcom,smd-edge = <1>;
+ qcom,remote-pid = <2>;
+
+ apr {
+ compatible = "qcom,apr-v2";
+ qcom,smd-channels = "apr_audio_svc";
+ qcom,apr-domain = <APR_DOMAIN_ADSP>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ q6core: service@3 {
+ reg = <APR_SVC_ADSP_CORE>;
+ compatible = "qcom,q6core";
+ };
+
+ q6afe: service@4 {
+ compatible = "qcom,q6afe";
+ reg = <APR_SVC_AFE>;
+ q6afedai: dais {
+ compatible = "qcom,q6afe-dais";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ #sound-dai-cells = <1>;
+
+ dai@16 {
+ reg = <PRIMARY_MI2S_RX>;
+ qcom,sd-lines = <0 1>;
+ };
+ dai@20 {
+ reg = <TERTIARY_MI2S_TX>;
+ qcom,sd-lines = <0 1>;
+ };
+ dai@127 {
+ reg = <QUINARY_MI2S_RX>;
+ qcom,sd-lines = <0>;
+ };
+ };
+
+ q6afecc: clock-controller {
+ compatible = "qcom,q6afe-clocks";
+ #clock-cells = <2>;
+ };
+ };
+
+ q6asm: service@7 {
+ compatible = "qcom,q6asm";
+ reg = <APR_SVC_ASM>;
+ q6asmdai: dais {
+ compatible = "qcom,q6asm-dais";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ #sound-dai-cells = <1>;
+
+ dai@0 {
+ reg = <0>;
+ direction = <Q6ASM_DAI_RX>;
+ };
+ dai@1 {
+ reg = <1>;
+ direction = <Q6ASM_DAI_TX>;
+ };
+ dai@2 {
+ reg = <2>;
+ direction = <Q6ASM_DAI_RX>;
+ };
+ dai@3 {
+ reg = <3>;
+ direction = <Q6ASM_DAI_RX>;
+ is-compress-dai;
+ };
+ };
+ };
+
+ q6adm: service@8 {
+ compatible = "qcom,q6adm";
+ reg = <APR_SVC_ADM>;
+ q6routing: routing {
+ compatible = "qcom,q6adm-routing";
+ #sound-dai-cells = <0>;
+ };
+ };
+ };
+ };
+ };
};

thermal-zones {
--
2.25.1