[GIT PULL] clk: imx: Updates for v6.4
From: Abel Vesa
Date: Wed Apr 12 2023 - 09:23:45 EST
The following changes since commit fe15c26ee26efa11741a7b632e9f23b01aca4cc6:
Linux 6.3-rc1 (2023-03-05 14:52:03 -0800)
are available in the Git repository at:
git://git.kernel.org/pub/scm/linux/kernel/git/abelvesa/linux.git/ tags/clk-imx-6.4
for you to fetch changes up to 8a05f5cccdbe851265bf513643ada48c26b1267f:
clk: imx: imx8ulp: update clk flag for system critical clock (2023-04-09 17:12:49 +0300)
----------------------------------------------------------------
i.MX clocks changes for 6.4
- Add clock generic devm_clk_hw_register_gate_parent_data.
- Add audiomix block control for i.MX8MP.
- Add support for determine_rate to composite-8m.
- Add new macro for composite-8m to allow custom flags.
- Let the LCDIF Pixel clock of i.MX8MM and i.MX8MN set parent rate.
- Provide clock name in error message for clk-gpr-mux on get parent
failure.
- Drop duplicate imx_clk_mux_flags macro.
- Register the i.MX8MP Media Disp2 Pix clock as bus clock.
- Add Media LDB root clock to i.MX8MP.
- Make i.MX8MP nand_usdhc_bus clock as non-critical.
- Fix the rate table for fracn-gppll.
- Disable HW control for the fracn-gppll in order to be controlled by
register write.
- Add support for interger PLL in fracn-gppll.
- Add mcore_booted module parameter to i.MX93 provider.
- Add NIC, A55 and ARM PLL clocks to i.MX93.
- Fix i.MX8ULP XBAR_DIVBUS and AD_SLOW clock parents.
- Use "divider closest" clock type for PLL4_PFD dividers on i.MX8ULP to
get more accurate clock rates.
- Mark the MU0_Bi and TPM5 clocks on i.MX8ULP as critical.
- Update some of the critical clocks flags to allow glitchless
on-the-fly rate change.
----------------------------------------------------------------
Adam Ford (4):
clk: imx: composite-8m: Add support to determine_rate
clk: imx: Add imx8m_clk_hw_composite_flags macro
clk: imx8mm: Let IMX8MM_CLK_LCDIF_PIXEL set parent rate
clk: imx: Let IMX8MN_CLK_DISP_PIXEL set parent rate
Haibo Chen (1):
clk: imx: imx8mp: change the 'nand_usdhc_bus' clock to non-critical
Jacky Bai (5):
clk: imx: fracn-gppll: Add 300MHz freq support for imx9
clk: imx: imx8ulp: Add divider closest support to get more accurate clock rate
clk: imx: imx8ulp: keep MU0_B clock enabled always
clk: imx: imx8ulp: Add tpm5 clock as critical gate clock
clk: imx: imx8ulp: update clk flag for system critical clock
Liu Ying (1):
clk: imx: imx8mp: Add LDB root clock
Marek Vasut (3):
clk: Introduce devm_clk_hw_register_gate_parent_data()
clk: imx: imx8mp: Add audiomix block control
dt-bindings: clock: imx8mp: Add audiomix block control
Peng Fan (10):
clk: imx: drop duplicated macro
clk: imx: imx8mp: correct DISP2 pixel clock type
dt-bindings: clock: imx8mp: Add LDB clock entry
clk: imx: fracn-gppll: fix the rate table
clk: imx: fracn-gppll: disable hardware select control
clk: imx: fracn-gppll: support integer pll
clk: imx: imx93: add mcore_booted module paratemter
dt-bindings: clock: imx93: add NIC, A55 and ARM PLL CLK
clk: imx: imx93: Add nic and A55 clk
clk: imx: imx8ulp: Fix XBAR_DIVBUS and AD_SLOW clock parents
Stefan Wahren (1):
clk: imx: clk-gpr-mux: Provide clock name in error message
.../devicetree/bindings/clock/imx8mp-audiomix.yaml | 79 ++++++
drivers/clk/imx/Makefile | 2 +-
drivers/clk/imx/clk-composite-8m.c | 7 +
drivers/clk/imx/clk-composite-93.c | 8 +-
drivers/clk/imx/clk-fracn-gppll.c | 91 +++++--
drivers/clk/imx/clk-gpr-mux.c | 3 +-
drivers/clk/imx/clk-imx8mm.c | 2 +-
drivers/clk/imx/clk-imx8mn.c | 2 +-
drivers/clk/imx/clk-imx8mp-audiomix.c | 277 +++++++++++++++++++++
drivers/clk/imx/clk-imx8mp.c | 5 +-
drivers/clk/imx/clk-imx8ulp.c | 34 +--
drivers/clk/imx/clk-imx93.c | 19 +-
drivers/clk/imx/clk.h | 23 +-
include/dt-bindings/clock/imx8mp-clock.h | 4 +-
include/dt-bindings/clock/imx93-clock.h | 6 +-
include/linux/clk-provider.h | 19 ++
16 files changed, 535 insertions(+), 46 deletions(-)
create mode 100644 Documentation/devicetree/bindings/clock/imx8mp-audiomix.yaml
create mode 100644 drivers/clk/imx/clk-imx8mp-audiomix.c