From: Ryan Wanner <Ryan.Wanner@xxxxxxxxxxxxx>
The PIO4 does support push-pull configuration as this is the default
state of the open-drain register. Adapt the driver for this.
Signed-off-by: Ryan Wanner <Ryan.Wanner@xxxxxxxxxxxxx>
---
This patch also fixes the warning of unsupported
configuration param 8.
This was tested on both sama5d2-som1-ek and sama7g5ek. I used dbg_show
fucntion to test if the configuration was correct when adding
drive-open-drain or drive-push-pull to the dts file.
drivers/pinctrl/pinctrl-at91-pio4.c | 17 ++++++++++++-----
1 file changed, 12 insertions(+), 5 deletions(-)
diff --git a/drivers/pinctrl/pinctrl-at91-pio4.c b/drivers/pinctrl/pinctrl-at91-pio4.c
index a30c6f7c9016..9a0cddfeaf92 100644
--- a/drivers/pinctrl/pinctrl-at91-pio4.c
+++ b/drivers/pinctrl/pinctrl-at91-pio4.c
@@ -776,6 +776,11 @@ static int atmel_conf_pin_config_group_get(struct pinctrl_dev *pctldev,
return -EINVAL;
arg = 1;
break;
+ case PIN_CONFIG_DRIVE_PUSH_PULL:
+ if ((res & ATMEL_PIO_OPD_MASK))
+ return -EINVAL;
+ arg = 1;
+ break;
case PIN_CONFIG_INPUT_SCHMITT_ENABLE:
if (!(res & ATMEL_PIO_SCHMITT_MASK))
return -EINVAL;
@@ -839,10 +844,10 @@ static int atmel_conf_pin_config_group_set(struct pinctrl_dev *pctldev,
conf &= (~ATMEL_PIO_PUEN_MASK);
break;
case PIN_CONFIG_DRIVE_OPEN_DRAIN:
- if (arg == 0)
- conf &= (~ATMEL_PIO_OPD_MASK);
- else
- conf |= ATMEL_PIO_OPD_MASK;
+ conf |= ATMEL_PIO_OPD_MASK;
+ break;
+ case PIN_CONFIG_DRIVE_PUSH_PULL:
+ conf &= (~ATMEL_PIO_OPD_MASK);
break;
case PIN_CONFIG_INPUT_SCHMITT_ENABLE:
if (arg == 0)
@@ -937,8 +942,10 @@ static void atmel_conf_pin_config_dbg_show(struct pinctrl_dev *pctldev,
seq_printf(s, "%s ", "pull-down");
if (conf & ATMEL_PIO_IFEN_MASK)
seq_printf(s, "%s ", "debounce");
- if (conf & ATMEL_PIO_OPD_MASK)
+ if ((conf & ATMEL_PIO_OPD_MASK) > 0)
seq_printf(s, "%s ", "open-drain");
+ if ((conf & ATMEL_PIO_OPD_MASK) == 0)
+ seq_printf(s, "%s ", "push-pull");
if (conf & ATMEL_PIO_SCHMITT_MASK)
seq_printf(s, "%s ", "schmitt");
if (atmel_pioctrl->slew_rate_support && (conf & ATMEL_PIO_SR_MASK))