On 14/04/2023 12:52, Neha Malcom Francis wrote:
Document the binding for TI K3 ESM (Error Signaling Module) block.
Signed-off-by: Neha Malcom Francis <n-francis@xxxxxx>
---
.../devicetree/bindings/misc/esm-k3.yaml | 54 +++++++++++++++++++
1 file changed, 54 insertions(+)
create mode 100644 Documentation/devicetree/bindings/misc/esm-k3.yaml
diff --git a/Documentation/devicetree/bindings/misc/esm-k3.yaml b/Documentation/devicetree/bindings/misc/esm-k3.yaml
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index 000000000000..5e637add3b0e
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Filename matching compatible. Missing vendor prefix and device name.
@@ -0,0 +1,54 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+# Copyright (C) 2022 Texas Instruments Incorporated
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/misc/esm-k3.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Texas Instruments K3 ESM Binding
Drop: Binding
+
+maintainers:
+ - Neha Malcom Francis <n-francis@xxxxxx>
+
+description: |
+ The ESM (Error Signaling Module) is an IP block on TI K3 devices
+ that allows handling of safety events somewhat similar to what interrupt
+ controller would do. The safety signals have their separate paths within
+ the SoC, and they are handld by the ESM, which routes them to the proper
typo: handled
+ destination, which can be system reset, interrupt controller, etc. In the
+ simplest configuration the signals are just routed to reset the SoC.
There is no proper bindings directory for ESM? Misc is discouraged.
+
+properties:
+ compatible:
+ const: ti,j721e-esm
+
+ reg:
+ items:
+ - description: physical address and length of the registers which
+ contain revision and debug features
Drop useless "physical address and length of the registers which". reg
cannot be anything else.
+ - description: physical address and length of the registers which
+ indicate strapping options
+
+ ti,esm-pins:
+ $ref: /schemas/types.yaml#/definitions/uint32-array
+ description: |
Do not need '|' unless you need to preserve formatting.
+ integer array of ESM event IDs to route to external event pin which can
+ be used to reset the SoC. The array can have an arbitrary amount of event
+ IDs listed on it.
What is ESM event ID? The property name suggests pins...
+ minItems: 1
+ maxItems: 255
+
+additionalProperties: false
+
+required:
+ - compatible
+ - reg
+ - ti,esm-pins
+
+examples:
+ - |
+ main_esm: esm@700000 {
Drop label.
+ compatible = "ti,j721e-esm";
+ reg = <0x0 0x700000 0x0 0x1000>;
+ ti,esm-pins = <344>, <345>;
+ };
Best regards,
Krzysztof