[PATCH v3 3/3] PCI: brcmstb: Set PCIe transaction completion timeout

From: Jim Quinlan
Date: Wed Apr 19 2023 - 12:58:04 EST


Since the STB PCIe HW will cause a CPU abort on a PCIe transaction
completion timeout abort, we might as well extend the default timeout
limit. Further, different devices and systems may requires a larger or
smaller amount commensurate with their L1SS exit time, so the property
"brcm,completion-timeout-us" may be used to set a custom timeout value.

Tested-by: Florian Fainelli <f.fainelli@xxxxxxxxx>
Signed-off-by: Jim Quinlan <jim2101024@xxxxxxxxx>
---
drivers/pci/controller/pcie-brcmstb.c | 30 +++++++++++++++++++++++++++
1 file changed, 30 insertions(+)

diff --git a/drivers/pci/controller/pcie-brcmstb.c b/drivers/pci/controller/pcie-brcmstb.c
index c4b076ea5180..c2cb683447ac 100644
--- a/drivers/pci/controller/pcie-brcmstb.c
+++ b/drivers/pci/controller/pcie-brcmstb.c
@@ -1080,6 +1080,35 @@ static void brcm_config_clkreq(struct brcm_pcie *pcie)
writel(clkreq_set, pcie->base + PCIE_MISC_HARD_PCIE_HARD_DEBUG);
}

+static void brcm_config_completion_timeout(struct brcm_pcie *pcie)
+{
+ /* TIMEOUT register is two registers before RGR1_SW_INIT_1 */
+ const char *fmt = "brcm,completion-timeout-us clamped to region [%u..%u]\n";
+ const unsigned int REG_OFFSET = PCIE_RGR1_SW_INIT_1(pcie) - 8;
+ const u32 timeout_us_min = 16;
+ const u32 timeout_us_max = 19884107;
+ u32 timeout_us = 1000000; /* Our default, 1 second */
+ int rval, ret;
+
+ ret = of_property_read_u32(pcie->np, "brcm,completion-timeout-us",
+ &timeout_us);
+ if (ret && ret != -EINVAL)
+ dev_err(pcie->dev, "malformed/invalid 'brcm,completion-timeout-us'\n");
+
+ /* If needed, clamp the requested timeout value and issue a warning */
+ if (timeout_us < timeout_us_min) {
+ timeout_us = timeout_us_min;
+ dev_warn(pcie->dev, fmt, timeout_us_min, timeout_us_max);
+ } else if (timeout_us > timeout_us_max) {
+ timeout_us = timeout_us_max;
+ dev_warn(pcie->dev, fmt, timeout_us_min, timeout_us_max);
+ }
+
+ /* Each unit in timeout register is 1/216,000,000 seconds */
+ rval = 216 * timeout_us;
+ writel(rval, pcie->base + REG_OFFSET);
+}
+
static int brcm_pcie_start_link(struct brcm_pcie *pcie)
{
struct device *dev = pcie->dev;
@@ -1110,6 +1139,7 @@ static int brcm_pcie_start_link(struct brcm_pcie *pcie)
return -ENODEV;
}

+ brcm_config_completion_timeout(pcie);
brcm_config_clkreq(pcie);

if (pcie->gen)
--
2.17.1