Re: [PATCH 1/2] arm64: dts: imx8mn: Enable CSI and ISI Nodes

[Adam Ford]

On Sun, Apr 23, 2023 at 7:46 PM Laurent Pinchart
<laurent.pinchart@xxxxxxxxxxxxxxxx> wrote:
>
> Hi Adam,
>
> Thank you for the patch.
>
> On Sun, Apr 23, 2023 at 04:26:55PM -0500, Adam Ford wrote:
> > The CSI in the imx8mn is the same as what is used in the imx8mm,
> > but it's routed to the ISI on the Nano. Add both the ISI and CSI
> > nodes, and pointing them to each other. Since the CSI capture is
> > dependent on an attached camera, mark both ISI and CSI as
> > disabled by default.
>
> I'd then write the subject line as "Add CSI and ISI nodes".

That makes sense, especially since I disabled them by default.
>
> > Signed-off-by: Adam Ford <aford173@xxxxxxxxx>
> >
> > diff --git a/arch/arm64/boot/dts/freescale/imx8mn.dtsi b/arch/arm64/boot/dts/freescale/imx8mn.dtsi
> > index 8be8f090e8b8..102550b41f22 100644
> > --- a/arch/arm64/boot/dts/freescale/imx8mn.dtsi
> > +++ b/arch/arm64/boot/dts/freescale/imx8mn.dtsi
> > @@ -1104,6 +1104,24 @@ dsim_from_lcdif: endpoint {
> >                               };
> >                       };
> >
> > +                     isi: isi@32e20000 {
> > +                             compatible = "fsl,imx8mn-isi";
> > +                             reg = <0x32e20000 0x100>;
>
> The i.MX8MN reference manual documents the ISI registers block size to
> be 64kB. Should we use the same here, even if all the registers we need
> are within the first 256 bytes ?

I can do that.
>
> > +                             interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>;
> > +                             clocks = <&clk IMX8MN_CLK_DISP_AXI_ROOT>,
> > +                                      <&clk IMX8MN_CLK_DISP_APB_ROOT>;
> > +                             clock-names = "axi", "apb";
> > +                             fsl,blk-ctrl = <&disp_blk_ctrl>;
> > +                             power-domains = <&disp_blk_ctrl IMX8MN_DISPBLK_PD_ISI>;
> > +                             status = "disabled";
> > +
> > +                             port {
> > +                                     isi_in: endpoint {
> > +                                             remote-endpoint = <&mipi_csi_out>;
> > +                                     };
> > +                             };
>
> This will fail to validate against the ISI DT binding, as they require a
> "ports" node. When a single port is present using a "port" node directly
> is fine from an OF graph point of view, but to avoid too much complexity
> in the ISI binding the consensus was to always require a "ports" node
> for the ISI.


Argh!  I pulled from the wrong test repo.  I remember the discussion
from a few months back.  I'll fix it and the others when I submit V2.

>
> > +                     };
> > +
> >                       disp_blk_ctrl: blk-ctrl@32e28000 {
> >                               compatible = "fsl,imx8mn-disp-blk-ctrl", "syscon";
> >                               reg = <0x32e28000 0x100>;
> > @@ -1147,6 +1165,42 @@ disp_blk_ctrl: blk-ctrl@32e28000 {
> >                               #power-domain-cells = <1>;
> >                       };
> >
> > +                     mipi_csi: mipi-csi@32e30000 {
> > +                             compatible = "fsl,imx8mm-mipi-csi2";
> > +                             reg = <0x32e30000 0x1000>;
> > +                             interrupts = <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>;
> > +                             assigned-clocks = <&clk IMX8MN_CLK_CAMERA_PIXEL>,
> > +                                               <&clk IMX8MN_CLK_CSI1_PHY_REF>;
> > +                             assigned-clock-parents = <&clk IMX8MN_SYS_PLL2_1000M>,
> > +                                                       <&clk IMX8MN_SYS_PLL2_1000M>;
> > +                             assigned-clock-rates = <333000000>;
> > +                             clock-frequency = <333000000>;
> > +                             clocks = <&clk IMX8MN_CLK_DISP_APB_ROOT>,
> > +                                      <&clk IMX8MN_CLK_CAMERA_PIXEL>,
> > +                                      <&clk IMX8MN_CLK_CSI1_PHY_REF>,
> > +                                      <&clk IMX8MN_CLK_DISP_AXI_ROOT>;
> > +                             clock-names = "pclk", "wrap", "phy", "axi";
> > +                             power-domains = <&disp_blk_ctrl IMX8MN_DISPBLK_PD_MIPI_CSI>;
> > +                             status = "disabled";
> > +
> > +                             ports {
> > +                                     #address-cells = <1>;
> > +                                     #size-cells = <0>;
> > +
> > +                                     port@0 {
> > +                                             reg = <0>;
> > +                                     };
> > +
> > +                                     port@1 {
> > +                                             reg = <1>;
> > +
> > +                                             mipi_csi_out: endpoint {
> > +                                                     remote-endpoint = <&isi_in>;
> > +                                             };
> > +                                     };
> > +                             };
> > +                     };
> > +
> >                       usbotg1: usb@32e40000 {
> >                               compatible = "fsl,imx8mn-usb", "fsl,imx7d-usb", "fsl,imx27-usb";
> >                               reg = <0x32e40000 0x200>;
>
> --
> Regards,
>
> Laurent Pinchart