Re: [patch v3 08/36] x86/smpboot: Split up native_cpu_up() into separate phases and document them

From: Thomas Gleixner
Date: Tue May 09 2023 - 13:59:44 EST

On Tue, May 09 2023 at 14:07, Thomas Gleixner wrote:
> On Tue, May 09 2023 at 12:04, Peter Zijlstra wrote:
>> On Mon, May 08, 2023 at 09:43:39PM +0200, Thomas Gleixner wrote:
>>> + /*
>>> + * Sync point with wait_cpu_callin(). The AP doesn't wait here
>>> + * but just sets the bit to let the controlling CPU (BSP) know that
>>> + * it's got this far.
>>> + */
>>> smp_callin();
>>> - /* otherwise gcc will move up smp_processor_id before the cpu_init */
>>> + /* Otherwise gcc will move up smp_processor_id() before cpu_init() */
>>> barrier();
>> Not to the detriment of this patch, but this barrier() and it's comment
>> seem weird vs smp_callin(). That function ends with an atomic bitop (it
>> has to, at the very least it must not be weaker than store-release) but
>> also has an explicit wmb() to order setup vs CPU_STARTING.
>> (arguably that should be a full fence *AND* get a comment)
>> There is no way the smp_processor_id() referred to in this comment can
>> land before cpu_init() even without the barrier().
> Right. Let me clean that up.

So I went and tried to figure out where this comes from. It's from
d8f19f2cac70 ("[PATCH] x86-64 merge") in the history tree. One of those
well documented combo patches which change world and some more. The
context back then was:

* Dont put anything before smp_callin(), SMP
* booting is too fragile that we want to limit the
* things done here to the most necessary things.

Dprintk("cpu %d: waiting for commence\n", smp_processor_id());

That still does not explain what the barrier is doing. I tried to
harvest mailing list archives, but did not find anything. The back then
list discuss@xxxxxxxxxx was never publicly archived... Boris gave me an
tarball, but this 'barrier()' add on was nowhere discussed in public.

As the barrier has no obvious value, I'm adding a patch upfront which
removes it.