[PATCH 3/5] Documentation: riscv: vector: Use bullet lists for prctl list

From: Bagas Sanjaya
Date: Sun May 14 2023 - 05:04:57 EST

The documentation lists two userspace prctl() calls. Use bullet
lists for the listing.

Fixes: 412c68cfeeb178 ("riscv: Add documentation for Vector")
Signed-off-by: Bagas Sanjaya <bagasdotme@xxxxxxxxx>
Documentation/riscv/vector.rst | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/Documentation/riscv/vector.rst b/Documentation/riscv/vector.rst
index 178b3f3f452462..c7bd701c7963b6 100644
--- a/Documentation/riscv/vector.rst
+++ b/Documentation/riscv/vector.rst
@@ -13,7 +13,7 @@ order to support the use of the RISC-V Vector Extension.
Two new prctl() calls are added to allow programs to manage the enablement
status for the use of Vector in userspace:

-prctl(PR_RISCV_V_SET_CONTROL, unsigned long arg)
+* prctl(PR_RISCV_V_SET_CONTROL, unsigned long arg)

Sets the Vector enablement status of the calling thread, where the control
argument consists of two 2-bit enablement statuses and a bit for inheritance
@@ -89,7 +89,7 @@ prctl(PR_RISCV_V_SET_CONTROL, unsigned long arg)
* Every successful call overwrites a previous setting for the calling


Gets the same Vector enablement status for the calling thread. Setting for
next execve() call and the inheritance bit are all OR-ed together.
An old man doll... just what I always wanted! - Clara