[PATCH v14 0/8] Support AMD Pensando Elba SoC

From: Brad Larson
Date: Mon May 15 2023 - 14:18:27 EST

This series enables support for AMD Pensando Elba SoC based platforms.

The Elba SoC has the following features:
- Sixteen ARM64 A72 cores
- Dual DDR 4/5 memory controllers
- 32 lanes of PCIe Gen3/4 to the Host
- Network interfaces: Dual 200GE, Quad 100GE, 50GE, 25GE, 10GE and
also a single 1GE management port.
- Storage/crypto offloads and 144 programmable P4 cores.
- QSPI and EMMC for SoC storage
- Two SPI interfaces for peripheral management
- I2C bus for platform management

== V14 changes ==
Updated email list using get_maintainer.pl

Rebase to 6.4.0-rc1 and drop these patches (merged into 6.4.0)
- v13-0002-dt-bindings-mmc-cdns-Add-AMD-Pensando-Elba-SoC.patch
- v13-0004-dt-bindings-spi-dw-Add-AMD-Pensando-Elba-SoC-SPI.patch
- v13-0010-spi-dw-Add-support-for-AMD-Pensando-Elba-SoC.patch
- v13-0011-mmc-sdhci-cadence-Enable-device-specific-overrid.patch
- v13-0012-mmc-sdhci-cadence-Support-device-specific-init-d.patch
- v13-0013-mmc-sdhci-cadence-Add-AMD-Pensando-Elba-SoC-supp.patch
- v13-0014-mmc-sdhci-cadence-Support-mmc-hardware-reset.patch

- Change GPL-2.0-only or BSD-2-Clause to GPL-2.0-only OR BSD-2-Clause

- Fix dtbs_check l2-cache* property issue by adding required
cache-level and cache-unified properties
- Observed the issue after updating dtschema from 2023.1 to 2023.4
and yamllint from 1.26.3 to 1.30.0

- Save 8 bytes of code size by swapping spi_device and reset_controller_dev
in penctrl_device
- Code simplification and clarity from review inputs
- Set penctrl_spi_driver.driver.name to match compatible pensando-elba-ctrl
- Remove unused include in amd-pensando-ctrl.h
- Fix compile error, class_create() API changed

== V13 changes ==
- Use GENMASK(7, 3) in elba_priv_writel() to set all byte enables
- Add a variable 'shift' with GENMASK(1, 0) in elba_write_w() and
elba_write_b() to set the byte enable variable.

- Update include list in pensando-ctrl.c
- Change variable spi_dev to spi throughout
- Removed unneeded variable initialization, simplification of
error checks, remove extra castings, and use dev_err_probe()
- Sort the includes in amd-pensando-ctrl.h
- Updates to cleanup if there is an error in penctrl_spi_probe()

== V12 changes ==
- Correct property amd,pensando-elba-syscon description

- Add a newline in function dw_spi_elba_init()

- Fix gcc-12.1.0 warning:

== V11 changes ==
- Remove resets description and reset-names
- Add descriptions for amd,pensando-elba-sd4hc reg items

- Removed redundant if/then for amd,pensando-elba-qspi

- Fixed the compatible which should have stayed as
'amd,pensando-elba-ctrl', the commit message, and the filename.
- Reference spi-peripheral-props
- Delete spi-max-frequency
- Remove num-cs from example

- Delete reset-names
- Fix spi0 compatible to be specific 'amd,pensando-elba-ctrl'

- Simplify dw_spi_elb_init by using syscon_regmap_lookup_by_phandle()

- Remove elba-drv_init() call to platform_get_resource() since that
check is done inside devm_platform_ioremap_resource()
- Move spin_lock_init() before error check
- Remove extra parentheses

- Fix the compatible to be specific 'amd,pensando-elba-ctrl'
- Cast arguments flagged with a gcc-12.1.0 warning:
Reported-by: kernel test robot <lkp@xxxxxxxxx>
Link: https://lore.kernel.org/oe-kbuild-all/202303061526.I8VPcR1M-lkp@xxxxxxxxx/

== V10 changes ==
Binding property amd,pensando-elba-syscon was merged in 6.2

- Move reset-names property definition next to existing resets prop
- Move allOf to the bottom and set resets/reset-names required only for pensando
- Fix reg maxItems for existing, must be 1

- Fix cdns,fifo-depth, only amd,pensando-elba-qspi is 1024 bytes

- Move definition of amd,pensando-elba-syscon into properties with a better description
- Add amd,pensando-elba-syscon: false for non elba designs

- Property renamed to amd,pensando-ctrl
- Driver is renamed and moved to soc/drivers/amd affecting binding
- Delete cs property, driver handles device node creation from parent num-cs
fixing schema reg error in a different way

- Delete struct dw_spi_elba, use regmap directly in priv

- The 1st patch adding private writel() is unchanged. The 2nd patch is split
into two patches to provide for device specific init in one patch with no
effect on existing designs. Then add the pensando support into the next patch.
Then the 4th patch is mmc hardware reset support which is unchanged.

- New patch to provide for platform specific init() with no change
to existing designs.

- Add Elba specific support into this 3rd patch. This builds on the private
writel() enabled in patch 1 followed by platform specific init() in patch 2.
- Specify when first used the reason for the spinlock use to order byte-enable
prior to write data.

- Different driver implementation specific to this Pensando controller device.
- Moved to soc/amd directory under new name based on guidance. This driver is
of no use to any design other than all Pensando SoC based cards.
- Removed use of builtin_driver, can be built as a module.

== V9 changes ==
- Add reset-names and resets properties
- Add if/then on property amd,pensando-elba-sd4hc to set reg property
values for minItems and maxItems

- Add 1024 to cdns,fifo-depth property to resolve dtbs_check error

- Define property amd,pensando-elba-syscon
- Move compatible amd,pensando-elba-spi ahead of baikal,bt1-ssi

- Instead of four nodes, one per chip-select, a single
node is used with reset-cells in the parent.
- No MFD API is used anymore in the driver so it made
sense to move this to drivers/spi.
- This driver is common for all Pensando SoC based designs
so changed the name to pensando-sr.c to not make it Elba
SoC specific.
- Added property cs for the chip-select number which is used
by the driver to create /dev/pensr0.<cs>

- Single node for spi0 system-controller and squash
the reset-controller child into parent

- Rebase to linux-next 6.2.0-rc1

- Add use of macros GENMASK() and BIT()

- No change to this patch but as some patches are deleted and this is
a respin the three successive patches to sdhci-cadence.c are
patches 12, 13, and 14 which do the following:
1. Add ability for Cadence specific design to have priv writel().
2. Add Elba SoC support that requires its own priv writel() for
byte-lane control .
3. Add support for mmc hardware reset.

- Previously patch 17/17
- Changed delay after reset_control_assert() from 9 to 3 usec
- Renamed sdhci_mmc_hw_reset() to sdhci_cdns_mmc_hw_reset()

- Previously patch 14/17
- After the change to the device tree node and squashing
reset-cells into the parent simplified this to not use
any MFD API and move it to drivers/spi/pensando-sr.c.
- Change the naming to remove elba since this driver is common
for all Pensando SoC designs .

== V6 changes ==
- Updated copyright and SPDX

- Delete 'Device Tree Bindings' in title

- Change if/then for Elba which has a second reg for byte-lane control

- no change

- Add amd,pensando-elba-syscon

- no change

- Expand description, rename nodes and change compatible usage

- Delete nodename pattern and changed spi0 to spi
- File amd,pensando-elba-reset.h is deleted as there is only
one reset used.
- Update example

- no change

- no change

- Update node names and add amd,pensando-elba-syscon
- Delete use of amd,pensando-elba-reset.h which had a single definition

- Remove (void) cast

- Update use of amd,pensando-elba-syscon

- Change this patch to add a priv_writel() callback where all
existing designs use writel(). This separates the Elba
support into three patches. The second patch is added
to the end of the sequence for Elba support. The third
patch enables mmc hardware reset.

- Updates from review comments
- Use spi_message_init_with_transfers instead of init/add_tail API

- Remove use of amd,pensando-elba-reset.h and use BIT()

- Elba sdhci-cadence.c support added in this patch to build on
0013 which just adds a callback to override priv_writel()

- New patch where Elba has a reset-controller for mmc hardware
reset. The reset is implemented by a register in the cpld.

== V5 changes ==
- Change to AMD Pensando instead of Pensando.
- No reference to spidev in the device tree. Add multi-function driver
pensando-elbasr and sub-device reset-elbasr which provides mfd and
/dev interface to the cpld.
- Rebase to linux-next tag next-20220609 5.19.0-rc1
- Redo the email list after rebase and using scripts/get_maintainer.pl

== V4 changes ==
The version of dtschema used is 2022.3.2.

- Add description and board compatible

- Change from elba-emmc to elba-sd4hc to match file convention
- Use minItems: 1 and maxItems: 2 to pass schema check

- Add required property pensando,syscon-spics to go with

- Change Maintained to Supported

- Fix a typo on interface max speed

- Update due to spi-cadence-quadspi.c changes

- Change from elba-emmc to elba-sd4hc to match file convention

- Use more descriptive dt property pensando,syscon-spics
- Minor changes from review input

- Changed to dual copyright (GPL-2.0+ OR MIT)
- Minor changes from review input

== V3 changes ==
- This patch is deleted. Elba SOC specific gpio spics control is
integrated into spi-dw-mmio.c.

- Changed compatible to "pensando,elba-qspi" to be more descriptive
in spi-cadence-quadspi.c.

- Arnd wondered if moving to DT properties for quirks may be the
way to go. Feedback I've received on other patches was don't
mix two efforts in one patch so I'm currently just adding the
Elba support to the current design.

- Changed the implementation to use existing dw_spi_set_cs() and
integrated Elba specific CS control into spi-dw-mmio.c. The
native designware support is for two chip-selects while Elba
provides 4 chip-selects. Instead of adding a new file for
this support in gpio-elba-spics.c the support is in one
file (spi-dw-mmio.c).

- This patch is deleted. The addition of compatible "pensando,cpld"
to spidev.c is not added and an existing compatible is used
in the device tree to enable.

- Ulf and Yamada-san agreed the amount of code for this support
is not enough to need a new file. The support is added into
sdhci-cadence.c and new files sdhci-cadence-elba.c and
sdhci-cadence.h are deleted.
- Redundant defines are removed (e.g. use SDHCI_CDNS_HRS04 and
remove SDIO_REG_HRS4).
- Removed phy init function sd4_set_dlyvr() and used existing
sdhci_cdns_phy_init(). Init values are from DT properties.
- Replace devm_ioremap_resource(&pdev->dev, iomem)
with devm_platform_ioremap_resource(pdev, 1)
- Refactored the elba priv_writ_l() and elba_write_l() to
remove a little redundant code.
- The config option CONFIG_MMC_SDHCI_CADENCE_ELBA goes away.
- Only C syntax and Elba functions are prefixed with elba_

- Added a little more info to the platform help text to assist
users to decide on including platform support or not.

- Node names changed to DT generic names
- Changed from using 'spi@' which is reserved
- The elba-flash-parts.dtsi is kept separate as
it is included in multiple dts files.
- SPDX license tags at the top of each file
- The compatible = "pensando,elba" and 'model' are
now together in the board file.
- UIO nodes removed
- Ordered nodes by increasing unit address
- Removed an unreferenced container node.
- Dropped deprecated 'device_type' for uart0 node.

- Updated since the latest documentation has been converted to yaml

- This patch is deleted since the Elba gpio spics is added to
the spi dw driver and documented there.

Because of the deletion of patches and merging of code
the new patchset is not similar. A changelog is added into
the patches for merged code to be helpful on the history.

== V2 changes ==
- 01 Fix typo, return code value and log message.
- 03 Remove else clause, intrinsic DW chip-select is never used.
- 08-11 Split out dts and bindings to sub-patches
- 10 Converted existing cadence-quadspi.txt to YAML schema
- 13 New driver should use <linux/gpio/driver.h>

Brad Larson (8):
dt-bindings: arm: add AMD Pensando boards
dt-bindings: spi: cdns: Add compatible for AMD Pensando Elba SoC
dt-bindings: soc: amd: amd,pensando-elba-ctrl: Add Pensando SoC
arm64: Add config for AMD Pensando SoC platforms
arm64: dts: Add AMD Pensando Elba SoC support
spi: cadence-quadspi: Add compatible for AMD Pensando Elba SoC
soc: amd: Add support for AMD Pensando SoC Controller

.../devicetree/bindings/arm/amd,pensando.yaml | 26 ++
.../soc/amd/amd,pensando-elba-ctrl.yaml | 58 +++
.../bindings/spi/cdns,qspi-nor.yaml | 18 +-
arch/arm64/Kconfig.platforms | 12 +
arch/arm64/boot/dts/amd/Makefile | 1 +
arch/arm64/boot/dts/amd/elba-16core.dtsi | 197 ++++++++++
arch/arm64/boot/dts/amd/elba-asic-common.dtsi | 80 ++++
arch/arm64/boot/dts/amd/elba-asic.dts | 28 ++
arch/arm64/boot/dts/amd/elba-flash-parts.dtsi | 106 +++++
arch/arm64/boot/dts/amd/elba.dtsi | 191 +++++++++
drivers/soc/Kconfig | 1 +
drivers/soc/Makefile | 1 +
drivers/soc/amd/Kconfig | 16 +
drivers/soc/amd/Makefile | 2 +
drivers/soc/amd/pensando-ctrl.c | 368 ++++++++++++++++++
drivers/spi/spi-cadence-quadspi.c | 19 +
include/uapi/linux/amd-pensando-ctrl.h | 29 ++
18 files changed, 1160 insertions(+), 2 deletions(-)
create mode 100644 Documentation/devicetree/bindings/arm/amd,pensando.yaml
create mode 100644 Documentation/devicetree/bindings/soc/amd/amd,pensando-elba-ctrl.yaml
create mode 100644 arch/arm64/boot/dts/amd/elba-16core.dtsi
create mode 100644 arch/arm64/boot/dts/amd/elba-asic-common.dtsi
create mode 100644 arch/arm64/boot/dts/amd/elba-asic.dts
create mode 100644 arch/arm64/boot/dts/amd/elba-flash-parts.dtsi
create mode 100644 arch/arm64/boot/dts/amd/elba.dtsi
create mode 100644 drivers/soc/amd/Kconfig
create mode 100644 drivers/soc/amd/Makefile
create mode 100644 drivers/soc/amd/pensando-ctrl.c
create mode 100644 include/uapi/linux/amd-pensando-ctrl.h

base-commit: e922ba281a8d84f640d8c8e18a385d032c19e185