Re: [PATCH v2 1/1] MAINTAINERS: Update entry for PCIe driver for Intel LGM GW SoC

[Lei Chuan Hua]

On 24/5/2023 3:38 am, Bjorn Helgaas wrote:
> This email was sent from outside of MaxLinear.
>
>
> [+to Rahul, which I expect to bounce, but to give Rahul a chance to
> respond/ack]
>
> On Fri, May 19, 2023 at 12:45:55PM +0800, Zhu YiXin wrote:
>> Rahul Tanwar is no longer at Maxlinear, so update the MAINTAINER's entry
>> for the PCIe driver for Intel LGM GW SoC.
>>
>> Signed-off-by: Zhu YiXin <yzhu@xxxxxxxxxxxxx>
> This should also be acked by Chuanhua Lei, since I don't want to sign
> people up for work they don't expect.
Acked-by: Lei Chuanhua <lchuanhua@xxxxxxxxxxxxx>
>> ---
>>  MAINTAINERS | 2 +-
>>  1 file changed, 1 insertion(+), 1 deletion(-)
>>
>> diff --git a/MAINTAINERS b/MAINTAINERS
>> index c8d274efff10..6091bbb0e1d7 100644
>> --- a/MAINTAINERS
>> +++ b/MAINTAINERS
>> @@ -16383,7 +16383,7 @@ F:    Documentation/devicetree/bindings/pci/intel,keembay-pcie*
>>  F:   drivers/pci/controller/dwc/pcie-keembay.c
>>
>>  PCIE DRIVER FOR INTEL LGM GW SOC
>> -M:   Rahul Tanwar <rtanwar@xxxxxxxxxxxxx>
>> +M:   Chuanhua Lei <lchuanhua@xxxxxxxxxxxxx>
>>  L:   linux-pci@xxxxxxxxxxxxxxx
>>  S:   Maintained
>>  F:   Documentation/devicetree/bindings/pci/intel-gw-pcie.yaml
>> --
>> 2.17.1
>>
>