[PATCH v2 1/5] dt-bindings: gpio: Add HPE GXP GPIO

From: nick . hawkins
Date: Wed May 31 2023 - 11:23:57 EST

From: Nick Hawkins <nick.hawkins@xxxxxxx>

Provide access to the register regions and interrupt for GPIO. There
will be two drivers available. The first driver under the hpe,gxp-gpio
binding will provide GPIO information for the VUHC, CSM, and FN2
host interfaces. The second driver under the hpe,gxp-gpio-pl will
provide GPIO information from the CPLD interface. The main difference
and need for two separate bindings is they have different interrupt
parents. The other is hpe,gxp-gpio is a combination of physical
and virtual GPIOs where as hpe,gxp-gpio-pl are all physical
GPIOs from the CPLD.

Signed-off-by: Nick Hawkins <nick.hawkins@xxxxxxx>

---

v2:
*Put binding patch before the driver in the series
*Improved patch description
*Removed oneOf and items in compatible definition
*Moved additionalProperties definition to correct spot in file
*Fixed indentation on example
*Improved description in .yaml
---
.../bindings/gpio/hpe,gxp-gpio.yaml | 190 ++++++++++++++++++
1 file changed, 190 insertions(+)
create mode 100644 Documentation/devicetree/bindings/gpio/hpe,gxp-gpio.yaml

diff --git a/Documentation/devicetree/bindings/gpio/hpe,gxp-gpio.yaml b/Documentation/devicetree/bindings/gpio/hpe,gxp-gpio.yaml
new file mode 100644
index 000000000000..b92b7d72d39b
--- /dev/null
+++ b/Documentation/devicetree/bindings/gpio/hpe,gxp-gpio.yaml
@@ -0,0 +1,190 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/gpio/hpe,gxp-gpio.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: HPE GXP gpio controllers
+
+maintainers:
+ - Nick Hawkins <nick.hawkins@xxxxxxx>
+
+description:
+ Interruptable GPIO drivers for the HPE GXP that covers multiple interfaces
+ of both physical and virtual GPIO pins.
+
+properties:
+ compatible:
+ enum:
+ - hpe,gxp-gpio
+ - hpe,gxp-gpio-pl
+
+ reg:
+ minItems: 2
+ maxItems: 6
+
+ reg-names:
+ minItems: 2
+ maxItems: 6
+
+ gpio-controller: true
+
+ "#gpio-cells":
+ const: 2
+
+ gpio-line-names:
+ minItems: 80
+ maxItems: 300
+
+ interrupts:
+ maxItems: 1
+
+required:
+ - compatible
+ - reg
+ - reg-names
+ - gpio-controller
+ - "#gpio-cells"
+
+allOf:
+ - if:
+ properties:
+ compatible:
+ contains:
+ enum:
+ - hpe,gxp-gpio
+ then:
+ properties:
+ reg:
+ items:
+ - description: CSM GPIO interface
+ - description: fn2 virtual button GPIO
+ - description: fn2 system status GPIO
+ - description: vuhc GPIO status interface
+ reg-names:
+ items:
+ - const: csm
+ - const: fn2-vbtn
+ - const: fn2-stat
+ - const: vuhc
+ - if:
+ properties:
+ compatible:
+ contains:
+ enum:
+ - hpe,gxp-gpio-pl
+ then:
+ properties:
+ reg:
+ items:
+ - description: Programmable logic device GPIO
+ - description: Programmable logic device interrupt GPIO
+ reg-names:
+ items:
+ - const: base
+ - const: interrupt
+
+additionalProperties: false
+
+examples:
+ - |
+ gpio@0 {
+ compatible = "hpe,gxp-gpio";
+ reg = <0x0 0x400>, <0x200046 0x1>, <0x200070 0x08>, <0x400064 0x80>;
+ reg-names = "csm", "fn2-vbtn", "fn2-stat", "vuhc";
+ gpio-controller;
+ #gpio-cells = <2>;
+ interrupt-parent = <&vic0>;
+ interrupts = <10>;
+ gpio-line-names = "IOP_LED1", "IOP_LED2",
+ "IOP_LED3", "IOP_LED4",
+ "IOP_LED5", "IOP_LED6",
+ "IOP_LED7", "IOP_LED8",
+ "FAN1_INST", "FAN2_INST",
+ "FAN3_INST", "FAN4_INST",
+ "FAN5_INST", "FAN6_INST",
+ "FAN7_INST", "FAN8_INST",
+ "FAN1_FAIL", "FAN2_FAIL",
+ "FAN3_FAIL", "FAN4_FAIL",
+ "FAN5_FAIL", "FAN6_FAIL",
+ "FAN7_FAIL", "FAN8_FAIL",
+ "FAN1_ID", "FAN2_ID",
+ "FAN3_ID", "FAN4_ID",
+ "FAN5_ID", "FAN6_ID",
+ "FAN7_ID", "FAN8_ID",
+ "IDENTIFY", "HEALTH_RED",
+ "HEALTH_AMBER", "POWER_BUTTON",
+ "UID_PRESS", "SLP",
+ "NMI_BUTTON", "RESET_BUTTON",
+ "SIO_S5", "SO_ON_CONTROL",
+ "PSU1_INST", "PSU2_INST",
+ "PSU3_INST", "PSU4_INST",
+ "PSU5_INST", "PSU6_INST",
+ "PSU7_INST", "PSU8_INST",
+ "PSU1_AC", "PSU2_AC",
+ "PSU3_AC", "PSU4_AC",
+ "PSU5_AC", "PSU6_AC",
+ "PSU7_AC", "PSU8_AC",
+ "PSU1_DC", "PSU2_DC",
+ "PSU3_DC", "PSU4_DC",
+ "PSU5_DC", "PSU6_DC",
+ "PSU7_DC", "PSU8_DC",
+ "", "",
+ "", "",
+ "", "",
+ "", "",
+ "", "",
+ "", "",
+ "", "";
+ };
+
+ - |
+ gpio@51000300 {
+ compatible = "hpe,gxp-gpio-pl";
+ reg = <0x51000300 0x40>, <0x51000380 0x10>;
+ reg-names = "base", "interrupt";
+ gpio-controller;
+ #gpio-cells = <2>;
+ interrupt-parent = <&vic0>;
+ interrupts = <24>;
+ gpio-line-names = "IOP_LED1", "IOP_LED2",
+ "IOP_LED3", "IOP_LED4",
+ "IOP_LED5", "IOP_LED6",
+ "IOP_LED7", "IOP_LED8",
+ "FAN1_INST", "FAN2_INST",
+ "FAN3_INST", "FAN4_INST",
+ "FAN5_INST", "FAN6_INST",
+ "FAN7_INST", "FAN8_INST",
+ "FAN1_FAIL", "FAN2_FAIL",
+ "FAN3_FAIL", "FAN4_FAIL",
+ "FAN5_FAIL", "FAN6_FAIL",
+ "FAN7_FAIL", "FAN8_FAIL",
+ "FAN1_ID", "FAN2_ID",
+ "FAN3_ID", "FAN4_ID",
+ "FAN5_ID", "FAN6_ID",
+ "FAN7_ID", "FAN8_ID",
+ "IDENTIFY", "HEALTH_RED",
+ "HEALTH_AMBER", "POWER_BUTTON",
+ "UID_PRESS", "SLP",
+ "NMI_BUTTON", "RESET_BUTTON",
+ "SIO_S5", "SO_ON_CONTROL",
+ "PSU1_INST", "PSU2_INST",
+ "PSU3_INST", "PSU4_INST",
+ "PSU5_INST", "PSU6_INST",
+ "PSU7_INST", "PSU8_INST",
+ "PSU1_AC", "PSU2_AC",
+ "PSU3_AC", "PSU4_AC",
+ "PSU5_AC", "PSU6_AC",
+ "PSU7_AC", "PSU8_AC",
+ "PSU1_DC", "PSU2_DC",
+ "PSU3_DC", "PSU4_DC",
+ "PSU5_DC", "PSU6_DC",
+ "PSU7_DC", "PSU8_DC",
+ "", "",
+ "", "",
+ "", "",
+ "", "",
+ "", "",
+ "", "",
+ "", "";
+ };
--
2.17.1