Re: [PATCH 0/2] Update parts of PLL_TEST_CTL(_U) if required

[Iskren Chernev]

On June 1, 2023 12:39:06 PM GMT+03:00, Konrad Dybcio <konrad.dybcio@xxxxxxxxxx> wrote:
>Some recent-ish clock drivers touching on the "standard" Alpha PLLs
>have been specifying the values that should be written into the CTL
>registers as mask-value combos, but that wasn't always reflected
>properly (or at all).

Yeah, that would be me. I didn't feel confident enough to add the mask parameter, but it seems very reasonable.

> This series tries to fix that without affecitng
>the drivers that actually provide the full register values.
>
>Signed-off-by: Konrad Dybcio <konrad.dybcio@xxxxxxxxxx>

Reviewed-by: Iskren Chernev <me@xxxxxxxxxxx>

>---
>Konrad Dybcio (2):
>      clk: qcom: clk-alpha-pll: Add a way to update some bits of test_ctl(_hi)
>      clk: qcom: gcc-sm6115: Add missing PLL config properties
>
> drivers/clk/qcom/clk-alpha-pll.c | 19 +++++++++++++++----
> drivers/clk/qcom/clk-alpha-pll.h |  2 ++
> drivers/clk/qcom/gcc-sm6115.c    |  8 ++++++++
> 3 files changed, 25 insertions(+), 4 deletions(-)
>---
>base-commit: 571d71e886a5edc89b4ea6d0fe6f445282938320
>change-id: 20230601-topic-alpha_ctl-ab0dc0ad3654
>
>Best regards,