RE: [PATCH v4 2/3] dt-bindings: PCI: xilinx-xdma: Add YAML schemas for Xilinx XDMA PCIe Root Port Bridge

[Havalige, Thippeswamy]

Hi Krzysztof,

Regards,
Thippeswamy H

> -----Original Message-----
> From: Krzysztof Kozlowski <krzysztof.kozlowski@xxxxxxxxxx>
> Sent: Monday, June 5, 2023 1:09 PM
> To: Havalige, Thippeswamy <thippeswamy.havalige@xxxxxxx>;
> bhelgaas@xxxxxxxxxx; devicetree@xxxxxxxxxxxxxxx; linux-
> pci@xxxxxxxxxxxxxxx; linux-kernel@xxxxxxxxxxxxxxx; robh+dt@xxxxxxxxxx
> Cc: lorenzo.pieralisi@xxxxxxx; linux-arm-kernel@xxxxxxxxxxxxxxxxxxx;
> Gogada, Bharat Kumar <bharat.kumar.gogada@xxxxxxx>; Simek, Michal
> <michal.simek@xxxxxxx>; Yeleswarapu, Nagaradhesh
> <nagaradhesh.yeleswarapu@xxxxxxx>
> Subject: Re: [PATCH v4 2/3] dt-bindings: PCI: xilinx-xdma: Add YAML schemas
> for Xilinx XDMA PCIe Root Port Bridge
> 
> On 31/05/2023 10:38, Thippeswamy Havalige wrote:
> > Add YAML dtschemas of Xilinx XDMA Soft IP PCIe Root Port Bridge dt
> > binding.
> >
> > Signed-off-by: Thippeswamy Havalige <thippeswamy.havalige@xxxxxxx>
> > Signed-off-by: Bharat Kumar Gogada <bharat.kumar.gogada@xxxxxxx>
> > ---
> > change in v4:
> 
> 
> > +unevaluatedProperties: false
> > +
> > +examples:
> > +
> > +  - |
> > +    #include <dt-bindings/interrupt-controller/arm-gic.h>
> > +    #include <dt-bindings/interrupt-controller/irq.h>
> > +
> > +    soc {
> > +        #address-cells = <2>;
> > +        #size-cells = <2>;
> > +        pcie@a0000000 {
> > +            compatible = "xlnx,xdma-host-3.00";
> > +            reg = <0x0 0xa0000000 0x0 0x10000000>;
> > +            ranges = <0x2000000 0x0 0xB0000000 0x0 0xB0000000 0x0
> > + 0x1000000>,
> 
> If there is going to be resend, use lower-case hex everywhere.
> 
> Otherwise, it's fine:
-Agreed, ll update this in next patch.
> 
> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@xxxxxxxxxx>
> 
> Best regards,
> Krzysztof