Re: [PATCH] arm64: dts: ti: k3-j721s2: Change CPTS clock parent

[Neha Malcom Francis]

Hi Nishanth

On 05/06/23 17:19, Nishanth Menon wrote:
> On 16:34-20230605, Neha Malcom Francis wrote:
> > MAIN_PLL0 has a flag set in DM (Device Manager) that removes it's
> > capability to re-initialise clock frequencies. CPTS and RGMII has
> > MAIN_PLL3 as their parent which does not have this flag. While RGMII
> > needs this reinitialisation to default frequency to be able to get
> > 250MHz with its divider, CPTS can not get its required 200MHz with its
> > divider. Thus, move CPTS clock parent on J721S2 from MAIN_PLL3_HSDIV1 to
> > MAIN_PLL0_HSDIV6.
> >
> > (Note: even GTC will be moved from MAIN_PLL3 to MAIN_PLL0 in U-Boot side
> > for the same reason)
> >
> > Signed-off-by: Neha Malcom Francis <n-francis@xxxxxx>
> > ---
> >   arch/arm64/boot/dts/ti/k3-j721s2-main.dtsi       | 2 ++
> >   arch/arm64/boot/dts/ti/k3-j721s2-mcu-wakeup.dtsi | 2 ++
>
>
> Is this the only device with this change? or are we doing that across
> the board? if so, could you please do this in a single series so that we
> don't have a mix?

Currently, this is the only device that has moved this flag in DM side. 
None of the other devices (except for J784S4 which also made a similar 
change both in DM and U-BOOT) have this change in flag for the upcoming 
firmware release.

> >   2 files changed, 4 insertions(+)
> >
> > diff --git a/arch/arm64/boot/dts/ti/k3-j721s2-main.dtsi b/arch/arm64/boot/dts/ti/k3-j721s2-main.dtsi
> > index 2dd7865f7654..331e0c9b4db8 100644
> > --- a/arch/arm64/boot/dts/ti/k3-j721s2-main.dtsi
> > +++ b/arch/arm64/boot/dts/ti/k3-j721s2-main.dtsi
> > @@ -738,6 +738,8 @@ cpts@310d0000 {
> >   			reg-names = "cpts";
> >   			clocks = <&k3_clks 226 5>;
> >   			clock-names = "cpts";
> > +			assigned-clocks = <&k3_clks 226 5>; /* NAVSS0_CPTS_0_RCLK */
> > +			assigned-clock-parents = <&k3_clks 226 7>; /* MAIN_0_HSDIVOUT6_CLK */
> >   			interrupts-extended = <&main_navss_intr 391>;
> >   			interrupt-names = "cpts";
> >   			ti,cpts-periodic-outputs = <6>;
> > diff --git a/arch/arm64/boot/dts/ti/k3-j721s2-mcu-wakeup.dtsi b/arch/arm64/boot/dts/ti/k3-j721s2-mcu-wakeup.dtsi
> > index a353705a7463..b55a3e9daf85 100644
> > --- a/arch/arm64/boot/dts/ti/k3-j721s2-mcu-wakeup.dtsi
> > +++ b/arch/arm64/boot/dts/ti/k3-j721s2-mcu-wakeup.dtsi
> > @@ -333,6 +333,8 @@ cpts@3d000 {
> >   			reg = <0x0 0x3d000 0x0 0x400>;
> >   			clocks = <&k3_clks 29 3>;
> >   			clock-names = "cpts";
> > +			assigned-clocks = <&k3_clks 29 3>; /* CPTS_RFT_CLK */
> > +			assigned-clock-parents = <&k3_clks 29 5>; /* MAIN_0_HSDIVOUT6_CLK */
> >   			interrupts-extended = <&gic500 GIC_SPI 858 IRQ_TYPE_LEVEL_HIGH>;
> >   			interrupt-names = "cpts";
> >   			ti,cpts-ext-ts-inputs = <4>;
> > --
> > 2.34.1

--
Thanking You
Neha Malcom Francis