On 25/05/2023 14:29, Srinivas Kandagatla wrote:Thanks, will fix in v3
The LPASS (Low Power Audio Subsystem) Audio clock controller provides reset
support when it is under the control of Q6DSP.
A nit, subject: drop second/last, redundant "YAML schemas for". The
"dt-bindings" prefix is already stating that these are
bindings/schemas/YAML/etc.
Same comment for first patch.
Add support for those resets and adds IDs for clients to request the reset.
Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@xxxxxxxxxx>
---
.../bindings/clock/qcom,sc8280xp-lpasscc.yaml | 11 +++++++++++
include/dt-bindings/clock/qcom,lpasscc-sc8280xp.h | 5 +++++
2 files changed, 16 insertions(+)
diff --git a/Documentation/devicetree/bindings/clock/qcom,sc8280xp-lpasscc.yaml b/Documentation/devicetree/bindings/clock/qcom,sc8280xp-lpasscc.yaml
index 08a9ae60a365..0557e74d3c3b 100644
--- a/Documentation/devicetree/bindings/clock/qcom,sc8280xp-lpasscc.yaml
+++ b/Documentation/devicetree/bindings/clock/qcom,sc8280xp-lpasscc.yaml
@@ -21,6 +21,7 @@ properties:
compatible:
enum:
+ - qcom,sc8280xp-lpassaudiocc
- qcom,sc8280xp-lpasscc
qcom,adsp-pil-mode:
@@ -45,6 +46,16 @@ required:
additionalProperties: false
examples:
+ - |
+ #include <dt-bindings/clock/qcom,lpasscc-sc8280xp.h>
+ lpass_audiocc: clock-controller@32a9000 {
+ compatible = "qcom,sc8280xp-lpassaudiocc";
+ reg = <0x032a9000 0x1000>;
+ qcom,adsp-pil-mode;
+ #reset-cells = <1>;
+ #clock-cells = <1>;
+ };
No need for new example - it's basically the same.
Best regards,
Krzysztof