Re: [PATCH v3 2/5] gpio: gxp: Add HPE GXP GPIO
From: Hawkins, Nick
Date: Wed Jun 07 2023 - 16:46:31 EST
> It does care about things the average GPIO controller driver needs to
> repeat. So at least you may try and see how it will look.
> > If gpio_regmap is required, how do I create a direct correlation
> > between a specific gpio-line and a register offset? For example, in
> > gpio-gxp-pl.c. Gpio-line at offset 0 (IOPLED) is at register 0x04. The
> > gpio-line at offset 8 (FAN_INST) is at register 0x27.
> You may remap registers. See, for example, gpio-pca953x, where some of
> the registers (with high bit set) are actually virtual rather than
> real offsets. Similar idea can be used in your case.
Greetings Andy,
Is there any documents available describing how regmap_gpio
populates the GPIO lines? Does it automatically go through and add lines
for each successful regmap_read and bits per byte?
I have taken your advice and used the additional readable and writeable
on regmap_config to limit the number of accessible registers.
static const struct regmap_config gxp_regmap_config = {
.reg_bits = 8,
.reg_stride = 1,
.val_bits = 8,
.readable_reg = gxp_readable_register,
.writeable_reg = gxp_writeable_register,
.max_register = 0x80,
.name = "gxp-gpio-pl",
};
static const struct regmap_config gxp_int_regmap_config = {
.reg_bits = 8,
.reg_stride = 1,
.val_bits = 8,
.readable_reg = gxp_read_write_int_register,
.writeable_reg = gxp_read_write_int_register,
.max_register = 0x7f
.name = "gxp-gpio-pl-int"
};
Thanks,
-Nick Hawkins