Re: [PATCH v3 2/9] clk: ralink: add clock and reset driver for MTMIPS SoCs

[Sergio Paracuellos]

On Sat, Jun 17, 2023 at 4:44 PM Krzysztof Kozlowski
<krzysztof.kozlowski@xxxxxxxxxx> wrote:
>
> On 17/06/2023 15:26, Sergio Paracuellos wrote:
> >>> void __init plat_time_init(void)
> >>> {
> >>> +      struct of_phandle_args clkspec;
> >>>       struct clk *clk;
> >>> +      int cpu_clk_idx;
> >>>
> >>>       ralink_of_remap();
> >>>
> >>> -      ralink_clk_init();
> >>> -      clk = clk_get_sys("cpu", NULL);
> >>> +      cpu_clk_idx = clk_cpu_index();
> >>> +      if (cpu_clk_idx == -1)
> >>> +              panic("unable to get CPU clock index");
> >>> +
> >>> +      of_clk_init(NULL);
> >>> +      clkspec.np = of_find_node_by_name(NULL, "sysc");
> >>
> >> The node name should be "syscon" as the example node name in the
> >> dt-bindings document is "syscon".
> >
> > sysc is label to get this node since it is the one shared by all
> > different dtsi files.
>
> If it is label, why do you use it to get by name? name != label.

Sorry I meant both of them, node name in dtsi file and also label for
referring to it from other nodes.

>
> Best regards,
> Krzysztof
>

Best regards,
    Sergio Paracuellos