The 06/16/2023 16:53, Radu Pirea (NXP OSS) wrote:Ok. I will merge the workarounds in patches 9 and 12 if it looks better to you. The intention here was to implement the timestamp reading sequence in a clean way and to add the workarounds later.
Hi Radu,
On TJA1120 engineering samples, the new timestamp is stuck in the FIFO.
If the MORE_TS bit is set and the VALID bit is not set, we know that we
have a timestamp in the FIFO but not in the buffer.
To move the new timestamp in the buffer registers, the current
timestamp(which is invalid) is unlocked by writing any of the buffer
registers.
Shouldn't this be split and merged in patch 9 and patch 10?
As those two patches introduced this functions with issues.
--
/Horatiu