Re: [PATCH net-next 3/3] net: dsa: microchip: fix writes to phy registers >= 0x10

[Andrew Lunn]

On Tue, Jun 20, 2023 at 01:38:54PM +0200, Rasmus Villemoes wrote:
> According to the errata sheets for ksz9477 and ksz9567, writes to the
> PHY registers 0x10-0x1f (i.e. those located at addresses 0xN120 to
> 0xN13f) must be done as a 32 bit write to the 4-byte aligned address
> containing the register, hence requires a RMW in order not to change
> the adjacent PHY register.

ASIC engineers do see to come up with novel ways to break things.

I assume you have not seen real problems with this, which is why it is
not for net and a Fixes: tag?

Reviewed-by: Andrew Lunn <andrew@xxxxxxx>

    Andrew