Re: [PATCH v1 1/1] net: phy: dp83td510: fix kernel stall during netboot in DP83TD510E PHY driver
From: Andrew Lunn
Date: Tue Jun 20 2023 - 15:33:30 EST
On Tue, Jun 20, 2023 at 02:55:05PM +0200, Oleksij Rempel wrote:
> Fix an issue where the kernel would stall during netboot, showing the
> "sched: RT throttling activated" message. This stall was triggered by
> the behavior of the mii_interrupt bit (Bit 7 - DP83TD510E_STS_MII_INT)
> in the DP83TD510E's PHY_STS Register (Address = 0x10). The DP83TD510E
> datasheet (2020) states that the bit clears on write, however, in
> practice, the bit clears on read.
>
> This discrepancy had significant implications on the driver's interrupt
> handling. The PHY_STS Register was used by handle_interrupt() to check
> for pending interrupts and by read_status() to get the current link
> status. The call to read_status() was unintentionally clearing the
> mii_interrupt status bit without deasserting the IRQ pin, causing
> handle_interrupt() to miss other pending interrupts. This issue was most
> apparent during netboot.
>
> The fix refrains from using the PHY_STS Register for interrupt handling.
> Instead, we now solely rely on the INTERRUPT_REG_1 Register (Address =
> 0x12) and INTERRUPT_REG_2 Register (Address = 0x13) for this purpose.
> These registers directly influence the IRQ pin state and are latched
> high until read.
>
> Note: The INTERRUPT_REG_2 Register (Address = 0x13) exists and can also
> be used for interrupt handling, specifically for "Aneg page received
> interrupt" and "Polarity change interrupt". However, these features are
> currently not supported by this driver.
>
> Fixes: 165cd04fe253 ("net: phy: dp83td510: Add support for the DP83TD510 Ethernet PHY")
> Signed-off-by: Oleksij Rempel <o.rempel@xxxxxxxxxxxxxx>
It would be good to add a Cc: <stable@xxxxxxxxxxxxxxx>. It will
probably get back ported with it, but the process does require it.
Reviewed-by: Andrew Lunn <andrew@xxxxxxx>
Andrew