Re: [PATCH v2 3/4] spi: Split transfers larger than max size

From: Mark Brown
Date: Fri Jun 23 2023 - 13:16:44 EST


On Fri, Jun 23, 2023 at 11:45:19AM -0500, Eddie James wrote:
> On 6/22/23 16:16, Mark Brown wrote:
> > On Thu, Jun 22, 2023 at 02:48:36PM -0500, Eddie James wrote:
> > > On 9/27/22 06:21, Vincent Whitchurch wrote:

> > > > A couple of drivers call spi_split_transfers_maxsize() from their
> > > > ->prepare_message() callbacks to split transfers which are too big for
> > > > them to handle. Add support in the core to do this based on
> > > > ->max_transfer_size() to avoid code duplication.

> > > I've been testing AT25 functionality in linux 6.1 and I believe this patch
> > > is breaking the AT25 protocol. It will split a write command up such that
> > > some of the data is in a different transfer than  the write enable and

> > Could you be more specific about the manner in which you think this is
> > breaking things? The size of transfer is immaterial to the client

> Ok, I understand better now. Agreed it shouldn't make a difference, but this
> is actually a limitation of the spi controller I'm using (spi-fsi). The
> controller cannot handle multiple transfers keeping the chip select
> enabled... I guess the driver can batch transfers in the message to get
> around this, unless you want to add a flag for that behavior.

Client drivers should in general just generate messages corresponding to
the desired result visible to the device and let the controller worry
about how to actually accomplish that, splitting transfers needlessly is
just going to create overheads. If there's scatter/gather going on
that does complicate things a bit though so it's not always going to
happen. If the controller driver needs to rewrite the message to
combine transfers then it should do that (or tell the core to do so on
it's behalf), just like with splitting transfers due to length limits.

> > In any case this is all based on the maximum transfer size advertised by
> > the conteroller driver, if the device can physically handle larger
> > transfers then there's no reason for it to set a limit. If the driver
> > can't physically handle larger transfers and it does make a difference
> > then the system simply won't work.

> Yep, this is also an artifact of the spi-fsi driver having different
> transfer size limits for writes and reads. Funnily enough the at25 driver
> doesn't truly respect the max transfer size (it doesn't include the write
> command and address bytes in the calculation against the max transfer size)
> so that's how this worked previously.

Yes, the logic there looks incorrect. As well as the issue you've
identified the driver should really be using spi_max_message_size(),
with a controller that can't control chip select effectivley like the
FSI driver that'll be the same a the transfer size but other drivers
will be able to chain multiple transfers together even if there's limits
on the transfer length.

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