On 16.06.2023 12:35, Mohammad Rafi Shaik wrote:For AR solution, it is required to add "qcom,adsp-pil-mode" flag to enable ahbm and ahbs clocks.
From: Srinivasa Rao Mandadapu <quic_srivasam@xxxxxxxxxxx>That's a whole bunch of hacky bindings that makes no sense..
Add "qcom,adsp-pil-mode" property in clock nodes for herobrine
crd revision 3 board specific device tree.
This is to register clocks conditionally by differentiating ADSP
based platforms and legacy path platforms.
Also disable lpass_core clock, as it is creating conflict
with ADSP clocks and it is not required for ADSP based platforms.
Signed-off-by: Srinivasa Rao Mandadapu <quic_srivasam@xxxxxxxxxxx>
Signed-off-by: Mohammad Rafi Shaik <quic_mohs@xxxxxxxxxxx>
---
.../qcom/sc7280-herobrine-audioreach-wcd9385.dtsi | 12 ++++++++++++
1 file changed, 12 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/sc7280-herobrine-audioreach-wcd9385.dtsi b/arch/arm64/boot/dts/qcom/sc7280-herobrine-audioreach-wcd9385.dtsi
index c02ca393378f..876a29178d46 100644
--- a/arch/arm64/boot/dts/qcom/sc7280-herobrine-audioreach-wcd9385.dtsi
+++ b/arch/arm64/boot/dts/qcom/sc7280-herobrine-audioreach-wcd9385.dtsi
@@ -197,6 +197,14 @@ q6prmcc: clock-controller {
};
};
+&lpass_aon {
+ qcom,adsp-pil-mode;
What should have been done from the beginning is:
- all clocks should be registered inside the clock driver, unconditionally
as far as .c code is concerned
- the regmap properties within should reflect the actual max register
range within the hardware block
- device-tree should contain protected-clocks, which omits registering
specified clks (I guess in the ADSP-less case you could probably even
register all of them and it wouldn't hurt)
Okay, will change status flag.+};status = "reserved";
+
+&lpass_core {
+ status = "disabled";
Konrad
+};
+
&lpass_rx_macro {
/delete-property/ power-domains;
/delete-property/ power-domain-names;
@@ -239,3 +247,7 @@ &lpass_va_macro {
status = "okay";
};
+
+&lpasscc {
+ qcom,adsp-pil-mode;
+};