[PATCH V11 5/5] samples: ftrace: Make the riscv samples support RV32I
From: Song Shuai
Date: Tue Jun 27 2023 - 07:17:08 EST
Since the commit f32b4b467ebd ("RISC-V: enable dynamic ftrace for
RV32I") enables dynamic ftrace for RV32I, make these riscv samples
also support RV32I.
Link: https://lore.kernel.org/all/mhng-29a592bf-1b25-4c6c-8f37-0d05d39bc093@palmer-ri-x1c9a/
Signed-off-by: Song Shuai <suagrfillet@xxxxxxxxx>
---
samples/ftrace/ftrace-direct-modify.c | 27 +++++++++--------
samples/ftrace/ftrace-direct-multi-modify.c | 33 +++++++++++----------
samples/ftrace/ftrace-direct-multi.c | 17 ++++++-----
samples/ftrace/ftrace-direct-too.c | 25 ++++++++--------
samples/ftrace/ftrace-direct.c | 17 ++++++-----
5 files changed, 62 insertions(+), 57 deletions(-)
diff --git a/samples/ftrace/ftrace-direct-modify.c b/samples/ftrace/ftrace-direct-modify.c
index e90ca7b68314..071cf4093a24 100644
--- a/samples/ftrace/ftrace-direct-modify.c
+++ b/samples/ftrace/ftrace-direct-modify.c
@@ -23,32 +23,33 @@ extern void my_tramp2(void *);
static unsigned long my_ip = (unsigned long)schedule;
#ifdef CONFIG_RISCV
+#include <asm/asm.h>
asm (
" .pushsection .text, \"ax\", @progbits\n"
" .type my_tramp1, @function\n"
" .globl my_tramp1\n"
" my_tramp1:\n"
-" addi sp,sp,-16\n"
-" sd t0,0(sp)\n"
-" sd ra,8(sp)\n"
+" addi sp,sp,-2*"SZREG"\n"
+" "REG_S" t0,0*"SZREG"(sp)\n"
+" "REG_S" ra,1*"SZREG"(sp)\n"
" call my_direct_func1\n"
-" ld t0,0(sp)\n"
-" ld ra,8(sp)\n"
-" addi sp,sp,16\n"
+" "REG_L" t0,0*"SZREG"(sp)\n"
+" "REG_L" ra,1*"SZREG"(sp)\n"
+" addi sp,sp,2*"SZREG"\n"
" jr t0\n"
" .size my_tramp1, .-my_tramp1\n"
-
" .type my_tramp2, @function\n"
" .globl my_tramp2\n"
+
" my_tramp2:\n"
-" addi sp,sp,-16\n"
-" sd t0,0(sp)\n"
-" sd ra,8(sp)\n"
+" addi sp,sp,-2*"SZREG"\n"
+" "REG_S" t0,0*"SZREG"(sp)\n"
+" "REG_S" ra,1*"SZREG"(sp)\n"
" call my_direct_func2\n"
-" ld t0,0(sp)\n"
-" ld ra,8(sp)\n"
-" addi sp,sp,16\n"
+" "REG_L" t0,0*"SZREG"(sp)\n"
+" "REG_L" ra,1*"SZREG"(sp)\n"
+" addi sp,sp,2*"SZREG"\n"
" jr t0\n"
" .size my_tramp2, .-my_tramp2\n"
" .popsection\n"
diff --git a/samples/ftrace/ftrace-direct-multi-modify.c b/samples/ftrace/ftrace-direct-multi-modify.c
index 5a81af7b3af3..b754803d0a50 100644
--- a/samples/ftrace/ftrace-direct-multi-modify.c
+++ b/samples/ftrace/ftrace-direct-multi-modify.c
@@ -21,38 +21,39 @@ extern void my_tramp1(void *);
extern void my_tramp2(void *);
#ifdef CONFIG_RISCV
+#include <asm/asm.h>
asm (
" .pushsection .text, \"ax\", @progbits\n"
" .type my_tramp1, @function\n"
" .globl my_tramp1\n"
" my_tramp1:\n"
-" addi sp,sp,-24\n"
-" sd a0,0(sp)\n"
-" sd t0,8(sp)\n"
-" sd ra,16(sp)\n"
+" addi sp,sp,-3*"SZREG"\n"
+" "REG_S" a0,0*"SZREG"(sp)\n"
+" "REG_S" t0,1*"SZREG"(sp)\n"
+" "REG_S" ra,2*"SZREG"(sp)\n"
" mv a0,t0\n"
" call my_direct_func1\n"
-" ld a0,0(sp)\n"
-" ld t0,8(sp)\n"
-" ld ra,16(sp)\n"
-" addi sp,sp,24\n"
+" "REG_L" a0,0*"SZREG"(sp)\n"
+" "REG_L" t0,1*"SZREG"(sp)\n"
+" "REG_L" ra,2*"SZREG"(sp)\n"
+" addi sp,sp,3*"SZREG"\n"
" jr t0\n"
" .size my_tramp1, .-my_tramp1\n"
" .type my_tramp2, @function\n"
" .globl my_tramp2\n"
" my_tramp2:\n"
-" addi sp,sp,-24\n"
-" sd a0,0(sp)\n"
-" sd t0,8(sp)\n"
-" sd ra,16(sp)\n"
+" addi sp,sp,-3*"SZREG"\n"
+" "REG_S" a0,0*"SZREG"(sp)\n"
+" "REG_S" t0,1*"SZREG"(sp)\n"
+" "REG_S" ra,2*"SZREG"(sp)\n"
" mv a0,t0\n"
" call my_direct_func2\n"
-" ld a0,0(sp)\n"
-" ld t0,8(sp)\n"
-" ld ra,16(sp)\n"
-" addi sp,sp,24\n"
+" "REG_L" a0,0*"SZREG"(sp)\n"
+" "REG_L" t0,1*"SZREG"(sp)\n"
+" "REG_L" ra,2*"SZREG"(sp)\n"
+" addi sp,sp,3*"SZREG"\n"
" jr t0\n"
" .size my_tramp2, .-my_tramp2\n"
" .popsection\n"
diff --git a/samples/ftrace/ftrace-direct-multi.c b/samples/ftrace/ftrace-direct-multi.c
index 0e9bb94edade..a31f43ace85c 100644
--- a/samples/ftrace/ftrace-direct-multi.c
+++ b/samples/ftrace/ftrace-direct-multi.c
@@ -16,22 +16,23 @@ void my_direct_func(unsigned long ip)
extern void my_tramp(void *);
#ifdef CONFIG_RISCV
+#include <asm/asm.h>
asm (
" .pushsection .text, \"ax\", @progbits\n"
" .type my_tramp, @function\n"
" .globl my_tramp\n"
" my_tramp:\n"
-" addi sp,sp,-24\n"
-" sd a0,0(sp)\n"
-" sd t0,8(sp)\n"
-" sd ra,16(sp)\n"
+" addi sp,sp,-3*"SZREG"\n"
+" "REG_S" a0,0*"SZREG"(sp)\n"
+" "REG_S" t0,1*"SZREG"(sp)\n"
+" "REG_S" ra,2*"SZREG"(sp)\n"
" mv a0,t0\n"
" call my_direct_func\n"
-" ld a0,0(sp)\n"
-" ld t0,8(sp)\n"
-" ld ra,16(sp)\n"
-" addi sp,sp,24\n"
+" "REG_L" a0,0*"SZREG"(sp)\n"
+" "REG_L" t0,1*"SZREG"(sp)\n"
+" "REG_L" ra,2*"SZREG"(sp)\n"
+" addi sp,sp,3*"SZREG"\n"
" jr t0\n"
" .size my_tramp, .-my_tramp\n"
" .popsection\n"
diff --git a/samples/ftrace/ftrace-direct-too.c b/samples/ftrace/ftrace-direct-too.c
index 5c319db48af2..a1f86dd48847 100644
--- a/samples/ftrace/ftrace-direct-too.c
+++ b/samples/ftrace/ftrace-direct-too.c
@@ -18,25 +18,26 @@ void my_direct_func(struct vm_area_struct *vma,
extern void my_tramp(void *);
#ifdef CONFIG_RISCV
+#include <asm/asm.h>
asm (
" .pushsection .text, \"ax\", @progbits\n"
" .type my_tramp, @function\n"
" .globl my_tramp\n"
" my_tramp:\n"
-" addi sp,sp,-40\n"
-" sd a0,0(sp)\n"
-" sd a1,8(sp)\n"
-" sd a2,16(sp)\n"
-" sd t0,24(sp)\n"
-" sd ra,32(sp)\n"
+" addi sp,sp,-5*"SZREG"\n"
+" "REG_S" a0,0*"SZREG"(sp)\n"
+" "REG_S" a1,1*"SZREG"(sp)\n"
+" "REG_S" a2,2*"SZREG"(sp)\n"
+" "REG_S" t0,3*"SZREG"(sp)\n"
+" "REG_S" ra,4*"SZREG"(sp)\n"
" call my_direct_func\n"
-" ld a0,0(sp)\n"
-" ld a1,8(sp)\n"
-" ld a2,16(sp)\n"
-" ld t0,24(sp)\n"
-" ld ra,32(sp)\n"
-" addi sp,sp,40\n"
+" "REG_L" a0,0*"SZREG"(sp)\n"
+" "REG_L" a1,1*"SZREG"(sp)\n"
+" "REG_L" a2,2*"SZREG"(sp)\n"
+" "REG_L" t0,3*"SZREG"(sp)\n"
+" "REG_L" ra,4*"SZREG"(sp)\n"
+" addi sp,sp,5*"SZREG"\n"
" jr t0\n"
" .size my_tramp, .-my_tramp\n"
" .popsection\n"
diff --git a/samples/ftrace/ftrace-direct.c b/samples/ftrace/ftrace-direct.c
index ca95506b0350..fe6b7ef0a2d5 100644
--- a/samples/ftrace/ftrace-direct.c
+++ b/samples/ftrace/ftrace-direct.c
@@ -15,21 +15,22 @@ void my_direct_func(struct task_struct *p)
extern void my_tramp(void *);
#ifdef CONFIG_RISCV
+#include <asm/asm.h>
asm (
" .pushsection .text, \"ax\", @progbits\n"
" .type my_tramp, @function\n"
" .globl my_tramp\n"
" my_tramp:\n"
-" addi sp,sp,-24\n"
-" sd a0,0(sp)\n"
-" sd t0,8(sp)\n"
-" sd ra,16(sp)\n"
+" addi sp,sp,-3*"SZREG"\n"
+" "REG_S" a0,0*"SZREG"(sp)\n"
+" "REG_S" t0,1*"SZREG"(sp)\n"
+" "REG_S" ra,2*"SZREG"(sp)\n"
" call my_direct_func\n"
-" ld a0,0(sp)\n"
-" ld t0,8(sp)\n"
-" ld ra,16(sp)\n"
-" addi sp,sp,24\n"
+" "REG_L" a0,0*"SZREG"(sp)\n"
+" "REG_L" t0,1*"SZREG"(sp)\n"
+" "REG_L" ra,2*"SZREG"(sp)\n"
+" addi sp,sp,3*"SZREG"\n"
" jr t0\n"
" .size my_tramp, .-my_tramp\n"
" .popsection\n"
--
2.20.1