Re: [PATCH v2 0/9] Introduce SMT level and add PowerPC support
From: Laurent Dufour
Date: Thu Jun 29 2023 - 08:04:46 EST
Le 29/06/2023 à 13:10, Michael Ellerman a écrit :
Sachin Sant <sachinp@xxxxxxxxxxxxx> writes:
On 28-Jun-2023, at 3:35 PM, Laurent Dufour <ldufour@xxxxxxxxxxxxx> wrote:
I'm taking over the series Michael sent previously [1] which is smartly
reviewing the initial series I sent [2]. This series is addressing the
comments sent by Thomas and me on the Michael's one.
Here is a short introduction to the issue this series is addressing:
When a new CPU is added, the kernel is activating all its threads. This
leads to weird, but functional, result when adding CPU on a SMT 4 system
for instance.
Here the newly added CPU 1 has 8 threads while the other one has 4 threads
active (system has been booted with the 'smt-enabled=4' kernel option):
ltcden3-lp12:~ # ppc64_cpu --info
Core 0: 0* 1* 2* 3* 4 5 6 7
Core 1: 8* 9* 10* 11* 12* 13* 14* 15*
This mixed SMT level may confused end users and/or some applications.
Thanks for the patches Laurent.
Is the SMT level retained even when dynamically changing SMT values?
I am observing difference in behaviour with and without smt-enabled
kernel command line option.
When smt-enabled= option is specified SMT level is retained across
cpu core remove and add.
Without this option but changing SMT level during runtime using
ppc64_cpu —smt=<level>, the SMT level is not retained after
cpu core add.
That's because ppc64_cpu is not using the sysfs SMT control file, it's
just onlining/offlining threads manually.
If you run:
$ ppc64_cpu --smt=4
And then also do:
$ echo 4 > /sys/devices/system/cpu/smt/control
It should work as expected?
ppc64_cpu will need to be updated to do that automatically.
Hi Sachin and Michael,
Yes, ppc64_cpu will need an update, and I have a patch ready to be sent
once this series will be accepted.
By the way, I've a fix for the build issue reported against the patch
6/9. I'll send a v3 soon.
Cheers,
Laurent.