[PATCH 0/1] PCI: dwc: Use regular interrupt instead of chained

[Radu Rendec]

The DesignWare PCIe host driver uses a chained interrupt to demultiplex
the downstream MSI interrupts. In some circumstances, the system can get
into a state where the parent interrupt is triggered continuously, even
though reading the PCIe host registers doesn't identify any child MSI
interrupt source. This effectively locks up CPU0, which spends all the
time servicing these interrupts. This behavior has been observed on a
Qualcomm SA8540P Ride, with pcie2a and pcie3a enabled at the same time.

This is a clear example of how bypassing the interrupt core by using
chained interrupts can be very dangerous if the hardware misbehaves.
These issues are particularly hard to investigate, because the system
appears to be completely locked up.

The proposed solution is to use regular interrupts instead of chained
interrupts for the demultiplex handler in the PCI dwc driver. This
allows the interrupt storm detector to kick in and disable the faulty
interrupt. Testing showed that the interrupt storm is mitigated with no
visible impact (other than the specific log message), and the system
continues to run as expected. This is a much more desirable behavior
than a system lockup.

In a different thread [1], further advantages of regular over chained
interrupts were presented. This patch follows the guidelines set out in
that thread, and represents another real-life example of how things can
go really wrong with chained interrupts.

[1] https://lore.kernel.org/all/877csohcll.ffs@tglx/

Radu Rendec (1):
  PCI: dwc: Use regular interrupt instead of chained

 .../pci/controller/dwc/pcie-designware-host.c | 35 +++++++++----------
 1 file changed, 17 insertions(+), 18 deletions(-)

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2.41.0