From: Varalaxmi Bingi <varalaxmi.bingi@xxxxxxx>
Setting default i2c clock frequency for ZynqMP to maximum rate of 400kHz.
Current default value is 100kHz.
Signed-off-by: Varalaxmi Bingi <varalaxmi.bingi@xxxxxxx>
Signed-off-by: Michal Simek <michal.simek@xxxxxxx>
---
arch/arm64/boot/dts/xilinx/zynqmp.dtsi | 2 ++
1 file changed, 2 insertions(+)
diff --git a/arch/arm64/boot/dts/xilinx/zynqmp.dtsi b/arch/arm64/boot/dts/xilinx/zynqmp.dtsi
index 394db49ac6cb..675b88190845 100644
--- a/arch/arm64/boot/dts/xilinx/zynqmp.dtsi
+++ b/arch/arm64/boot/dts/xilinx/zynqmp.dtsi
@@ -648,6 +648,7 @@ i2c0: i2c@ff020000 {
status = "disabled";
interrupt-parent = <&gic>;
interrupts = <0 17 4>;
+ clock-frequency = <400000>;
reg = <0x0 0xff020000 0x0 0x1000>;
#address-cells = <1>;
#size-cells = <0>;
@@ -659,6 +660,7 @@ i2c1: i2c@ff030000 {
status = "disabled";
interrupt-parent = <&gic>;
interrupts = <0 18 4>;
+ clock-frequency = <400000>;
reg = <0x0 0xff030000 0x0 0x1000>;
#address-cells = <1>;
#size-cells = <0>;