Re: [6.5.0-rc1] unchecked MSR access error: RDMSR from 0xe2 at rIP: 0xffffffff87090227 (native_read_msr+0x7/0x40) (intel_idle_init_cstates_icpu)

[Peter Zijlstra]

On Tue, Jul 11, 2023 at 07:26:26AM -0700, Arjan van de Ven wrote:
> > 
> > Oohh, this vm-guest mode is new :/ But it doesn't make sense, that
> > commit babbles something about waking CPUs from idle to do TLB
> > invalidate, but that shouldn't be the case, that's what we have
> > kvm_flush_tlb_multi() for, it should avoid the IPI and flush on
> > vcpu-enter.
> > 
> > Arjan, what is the actual problem you're trying to solve any why hide
> > this in intel_idle ?
> 
> I'm trying to solve to get guests on par with bare metal in terms of all
> the idle capabilities -- including TLB flushing before going idle, but
> also all the other latency control mechanisms that cpuidle brings.

I'm probably stupid, but the TLB thing doesn't make sense to me. What
TLB invalidations are you having problems with?

Also, you patches come with 0% performance data.

> And yes this is in intel_idle for 2 reasons
> 1) we use the host latencies for the deeper C state and that needs intel idle information

How are guest idle and host idle related in any way? Guest might think
it will go idle for a long time, but the host will happily run another
vCPU.

This doesn't add up.

> 2) we are about to add umwait support to this as well (patches on the mailing list for
> the base infrastructure for this)

The only way umwait makes sense for a guest is to amortize the VMEXIT
cost, and in that respect it seems a perfect fit for that haltpoll
thing.