Re: [PATCH 2/7] crypto: stm32 - add new algorithms support
From: Thomas BOURGOIN
Date: Wed Jul 12 2023 - 03:59:18 EST
Hi Linus,
Did you run your test only with the patch adding the support for
STM32MP13 or did you try the whole patch set ?
The error is on the test vector number 4, which is an HASH of 64 bytes
which is exactly the size of a blcok for SHA1.
Did you try to run the test for SHA256 ? (I guess you will see the same
error on test vector 4)
I have two hypothesis :
- it could be related to the padding of the data. (I don't think, the
patch does not modify these lines)
- it could come from the way the first block of data is handle. To
start the first pre computation, we have to write 1 block + 1 word. The
test only write one block so maybe the issue is here.
On 7/6/23 09:37, Thomas BOURGOIN wrote:
> + /*
> + * After first block + 1 words are fill up,
> + * we only need to fill 1 block to start partial computation
> + */
> + rctx->state.blocklen -= sizeof(u32);
> +
I found a typo in the number of CSR to save/restore for the SHA1 and
SHA256 algorithm. It should be 38 instead of 22.
Tell me if it fixes the regression.
It could be possible to divide the patch in 2 (one patch rework
preparing MP13 and one patch with the new algorithm) but for the
upstream I do not know if it is relevant to have 2 patches instead of one.
Best regards,
Thomas
---
drivers/crypto/stm32/stm32-hash.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/crypto/stm32/stm32-hash.c
b/drivers/crypto/stm32/stm32-hash.c
index a50d73c18d5c..88a186c3dd78 100644
--- a/drivers/crypto/stm32/stm32-hash.c
+++ b/drivers/crypto/stm32/stm32-hash.c
@@ -74,7 +74,7 @@
/* Context swap register */
#define HASH_CSR_NB_SHA256_HMAC 54
-#define HASH_CSR_NB_SHA256 22
+#define HASH_CSR_NB_SHA256 38
#define HASH_CSR_NB_SHA512_HMAC 103
#define HASH_CSR_NB_SHA512 91
#define HASH_CSR_NB_SHA3_HMAC 88
--
2.25.1