On 14/07/2023 09:04, 蔡承達 wrote:
> This is because our register layout for PWM and Tach is not
continuous.
> PWM0 used 0x0 0x4, Tach0 used 0x8 0xc
> PWM1 used 0x10 0x14, Tach1 used 0x18 0x1c
> ...
> Each PWM/Tach instance has its own controller register and is not
dependent on others.
Your email reply quoting style is very difficult to read.
Hi Guenter,
Did you receive a response to my previous email?
I would like to inquire if you have any further concerns regarding the PWM
and Tach with 16 instances.
But isn't like this in all PWMs in all SoCs?