Re: [PATCH net-next] net: dsa: mv88e6xxx: Add erratum 3.14 for 88E6390X and 88E6190X

From: Andrew Lunn
Date: Fri Jul 14 2023 - 09:28:36 EST


> +static int mv88e6390x_serdes_erratum_3_14(struct mv88e6xxx_chip *chip)
> +{
> + int lanes[] = { MV88E6390_PORT9_LANE0, MV88E6390_PORT9_LANE1,
> + MV88E6390_PORT9_LANE2, MV88E6390_PORT9_LANE3,
> + MV88E6390_PORT10_LANE0, MV88E6390_PORT10_LANE1,
> + MV88E6390_PORT10_LANE2, MV88E6390_PORT10_LANE3 };

Please make this const. Otherwise you end up with two copies of it.

> + int err, i;
> +
> + /* 88e6390x-88e6190x errata 3.14:
> + * After chip reset, SERDES reconfiguration or SERDES core
> + * Software Reset, the SERDES lanes may not be properly aligned
> + * resulting in CRC errors
> + */
> +
> + for (i = 0; i < ARRAY_SIZE(lanes); i++) {
> + err = mv88e6390_serdes_write(chip, lanes[i],
> + MDIO_MMD_PHYXS,
> + 0xf054, 0x400C);

Does Marvell give this register a name? If so, please add a #define.
Are the bits in the register documented?

> + if (!err && up) {
> + if (chip->info->prod_num == MV88E6XXX_PORT_SWITCH_ID_PROD_6390X ||
> + chip->info->prod_num == MV88E6XXX_PORT_SWITCH_ID_PROD_6190X)

6191X? 6193X?

Please sort these into numerical order.


Andrew

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